A Fluxless and Low-Temperature Flip Chip Process Based on Insertion Technique

Abstract

International audienceAbstract: For heterogeneous materials assembly, the thermal expansion mismatch between the chip and the substrate is a roadblock for Hip chip bonding of ultrafine-pitch (<= 10 mu m) and large diagonal devices (>= 20 mm). Residual strains in bumps and device warpage have been calculated to evaluate the thermomechanical limits of a conventional flip chip soldering process using micro bumping. As a solution to overcome these limits, this paper describes a new patented flip-chip technology representing a technological breakthrough compared to conventional methods such as soldering or bonding through conductive adhesives. Electrical connections are performed by the insertion of metallic micro-tips in a ductile material. As a low-temperature process and fluxless technology, this method is adapted to fine-pitch and large devices. As a proof of concept, we present the bonding results obtained on fine-pitch large arrays of daisy chains with 500 x 500 contacts and 30-mu m pitch. The electrical contact has been demonstrated and characterized in terms of resistance and yield

Bonding dynamics of compliant microbump during ultrasonic bonding investigated by using Si strain gauge

“…In the stacking of heterogeneous materials, mismatch in coefficient of thermal expansion (CTE) is the most important bottleneck for high-density and fine-pitch interconnection, therefore, reduction in temperature required to bond bump electrodes is highly demanded. 6,7) In the solid-phase bonding of metals such as Au-Au and Cu-Cu, surface contamination impedes the bonding at low temperatures. An electroplated Au surface is contaminated with oxygen and=or carbon compounds in air ambient.…”

In situ observation of ultrasonic flip-chip bonding using high-speed camera

“…The integration of heterogeneous materials requires lowtemperature bonding of interconnects between two materials because, in the case of the image sensor produced by stack bonding of a compound semiconductor on Si, for example, mismatch of the coefficient of thermal expansion (CTE) between two materials gives constraints in the resolution of the image sensor. [1][2][3] To realize low-temperature bonding, we have been studying bonding using a cone-shaped microbump. [4][5][6] In our previous work, room-temperature bonding of an InGaAs/InP chip to a Si CMOS chip has been realized by using a cone-shaped Au microbump with ultrasonic application.…”

Room-temperature ultrasonic-bonding characteristics of compliant micro-bump investigated by ex-situ and in-situ measurements

“…In the stacking of heterogeneous materials, mismatch in the thermal expansion coefficient is the most important bottleneck for high-density and fine-pitch interconnection [1] and, therefore, reduction of temperature required to bond bump electrodes is highly demanded. In the solid phase bonding of metals such as Au-Au and Cu-Cu, surface contamination impede the bonding at low temperature.…”