2009
DOI: 10.1155/2009/548324
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A Formal Approach to the Verification of Networks on Chip

Abstract: DOI to the publisher's website.• The final author version and the galley proof are versions of the publication after peer review.• The final published version features the final layout of the paper including the volume, issue and page numbers. Link to publication General rightsCopyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal re… Show more

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Cited by 25 publications
(16 citation statements)
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“…We reuse the specification of the wormhole switching policy used in Borrione et al [2009]. Let S whs be that function.…”
Section: F Verbeek and J Schmaltzmentioning
confidence: 99%
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“…We reuse the specification of the wormhole switching policy used in Borrione et al [2009]. Let S whs be that function.…”
Section: F Verbeek and J Schmaltzmentioning
confidence: 99%
“…The current version of GeNoC [Borrione et al 2009] is restricted to safety properties. The global correctness theorem states that messages reaching a destination will reach the expected destination without modification of their content.…”
Section: Introductionmentioning
confidence: 99%
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“…In this context, Schmaltz and Helmy et al [1,18] proposed a functional formalization of networks. They define a generic function-named GeNoC-representing a network with an arbitrary routing function and switching policy.…”
Section: Applicationsmentioning
confidence: 99%