A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS

Jia, Hanxiang; Prawoto, Clarissa; Chi, Baoyong; Wang, Zhihua; Yue, C. Patrick

doi:10.1109/tcsi.2018.2799983

Cited by 130 publications

(47 citation statements)

References 19 publications

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“…The lower performance of A oo compared with A os , contrary to the load-pull simulations, is due to the larger output matching transformation ratio which increased the matching losses. When compared with [5]- [8], A os provides good competition in terms of P AE, P out , and 3 dB BW.…”

Section: Resultsmentioning

confidence: 99%

Harmonic Termination Effects on the Performance of 39-GHz Stacked CMOS Power Amplifiers

Love

Thian

Wilt³

et al. 2019

2019 IEEE Asia-Pacific Microwave Conference (APMC)

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The effects of the second and third harmonic impedances, Z 2f 0 and Z 3f 0 , on the performance of millimeterwave power amplifiers (PA) designed on the GlobalFoundries 22FDX CMOS process are investigated in this paper. Two sets of load-pull simulations, one with ideal drain bias-tee and another with non-ideal circuitry included, show that terminating the harmonics with open-circuits increases the efficiency while terminating them with short-circuits decreases it. The effects on the performance are much larger for the second harmonic termination than for the third. Four circuits were designed to evaluate all four combinations of open/short circuit harmonic terminations. The circuit with Z 2f 0 = ∞ and Z 3f 0 = 0 had the highest performance with P AE of 38.3%, Pout of 19 dBm, and Pout -3 dB BW of 20.3 GHz. The remaining three circuits had less competitive performance due to their more complicated load networks and higher output matching transformation ratios.

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Section: Resultsmentioning

confidence: 99%

Harmonic Termination Effects on the Performance of 39-GHz Stacked CMOS Power Amplifiers

Love

Thian

Wilt³

et al. 2019

2019 IEEE Asia-Pacific Microwave Conference (APMC)

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“…Compared with other wideband techniques, the transformerbased MCR matching network is more compact and simple in the layout, implying less insertion loss within mm-wave band circuits design. The symmetrical MCR provides a maximum trans-impedance and the design considerations have been analyzed in [23]. However, the quality factors of the two terminal-impedance are commonly different in the inter-stage matching.…”

Section: A Asymmetrical Mcr Matching Networkmentioning

confidence: 99%

“…Fig. 9 shows the ideal model of an MCR [23], consisting of two RLC resonators coupled by mutual inductance. In the case of inter-stage matching, the output impedance of the previous stage and the input impedance of the following stage can be equivalent to networks of a resistor in parallel with a capacitor, which can be absorbed into the resistance (R1 and R2) and capacitance (C1 and C2) of the MCR.…”

Section: A Asymmetrical Mcr Matching Networkmentioning

confidence: 99%

A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm P_sat for Sub-THz Imaging System

Zhang

Nie

et al. 2021

IEEE Access

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This paper presents a high-gain D-band power amplifier (PA) fabricated with 28-nm CMOS technology for a sub-terahertz frequency modulated continuous wave imaging system. It adopts two-channel power combining using artificial transmission lines to absorb the parasitic capacitance of the ground-signalground pad. The layout of the transistors and neutralization capacitors are optimized to improve the maximum stable gain, stability, and robustness. Asymmetrically magnetically coupled resonators are used in inter-stage and input matching networks to extend the operating bandwidth. The PA achieves a peak power gain of 21.9 dB and maximum output power of 11.8 dBm with 10.7% of power-added efficiency. Also, this PA can achieve higher than 10 dBm output power over the frequency range of 120-150 GHz.INDEX TERMS D-band, power amplifier (PA), sub-terahertz (sub-THz), CMOS, power combining, imaging system, frequency modulated continuous wave (FMCW).

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“…In the proposed design, transformers are used in matching networks. This is for compact size and convenient DC biasing, while occupying similar die area when compared to circuits with inductors [29].…”

Section: Pa Matching Network Designmentioning

confidence: 99%

“…This ensures the proposed PA can support any modulation scheme without limitations [28]. The proposed PA is implemented with a transformer-based matching network (TMN) to provide more degrees of design freedom, while occupying similar chip area as a single inductor [29]. While operating at V DD = 1 V, the proposed PA has achieved a saturated output power of 20.7 dBm and 22.4% peak PAE at 10 GHz (23.5% peak PAE at 11 GHz).…”

mentioning

confidence: 99%

A Two-Stage X-Band 20.7-dBm Power Amplifier in 40-nm CMOS Technology

Yang

Lee

et al. 2020

Electronics

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For higher integration density, X-band power amplifiers (PAs) with CMOS technology have been widely discussed in recent publications. However, with reduced power supply voltage and device size, it is a great challenge to design a compact PA with high output power and power-added efficiency (PAE). In the proposed design, a 40-nm standard CMOS process is used for higher integration with other RF building blocks, compared with other CMOS PA designs with larger process node. Transistor cells are designed with neutralization capacitors to increase stability and gain performance of the PA. As a trade-off among gain, output power, and PAE, the transistor cells in driving stage and power stage are biased for class A and class AB operation, respectively. Both transistor cells consist of two transistors working in differential mode. Furthermore, transformer-based matching networks (TMNs) are used to realize a two-stage X-band CMOS PA with compact size. The PA achieves an effective conductivity (EC) of 117.5, which is among the highest in recently reported X-band PAs in CMOS technology. The PA also attains a saturated output power (Psat) of 20.7 dBm, a peak PAE of 22.4%, and a gain of 25.6 dB at the center frequency of 10 GHz under a 1 V supply in 40-nm CMOS.

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A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS

Cited by 130 publications

References 19 publications

Harmonic Termination Effects on the Performance of 39-GHz Stacked CMOS Power Amplifiers

Harmonic Termination Effects on the Performance of 39-GHz Stacked CMOS Power Amplifiers

A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm P_sat for Sub-THz Imaging System

A Two-Stage X-Band 20.7-dBm Power Amplifier in 40-nm CMOS Technology

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A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS

Cited by 130 publications

References 19 publications

Harmonic Termination Effects on the Performance of 39-GHz Stacked CMOS Power Amplifiers

Harmonic Termination Effects on the Performance of 39-GHz Stacked CMOS Power Amplifiers

A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm Psat for Sub-THz Imaging System

A Two-Stage X-Band 20.7-dBm Power Amplifier in 40-nm CMOS Technology

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A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm P_sat for Sub-THz Imaging System