A Fully Configurable PUF Using Dynamic Variations of Resistive Crossbar Arrays

Abstract

A resistive random access memory (RRAM) as an emerging nanoelectronic device, is widely used for memory and physical unclonable function (PUF) applications. The compatibility of RRAM PUFs with memory architectures can be exploited to reduce the hardware overhead. Therefore, an intrinsic PUF using dynamic variations of resistive crossbar arrays is presented in this paper. Based on an improved sense amplifier (SA), the proposed intrinsic RRAM PUF can be fully configured as a memory cell or a PUF cell, leading to a minimal design overhead. Using the device-to-device (D2D) variation of an RRAM, a significant number of challenge-response pairs (CRPs) is generated with a flexible configuration of the resistive crossbar arrays. The proposed RRAM PUF can be refreshed to a new instance relying on the cycle-to-cycle (C2C) variation of an RRAM. An efficient challenge generation method is presented to improve the security of the proposed RRAM PUF. To verify the performance of the proposed RRAM PUF, 20 instances are simulated and implemented using a compact Spice model and a UMC 65nm CMOS process technology, respectively. The simulation results show that the proposed RRAM PUF exhibits good performances with a high uniqueness, reliability, and reconfigurability. The randomness of the PUF is evaluated by the National Institute of Standards and Technology (NIST) and autocorrelation function (ACF) tests. Moreover, the experimental results show that the proposed RRAM PUF achieves a good resistance against machine learning (ML) attacks.

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“…Large amounts of power are consumed by traditional CMOS PUFs, A PUF design for all-spin circuits based on STT-mCell technology a linear feedback shift register (LFSR) with K stages is used [210]. A unique PUF design and generation scheme that uses resistive random access memory (RRAM) cells' inherent program-time variation as an entropy source as CMOS is vulnerable to secure communication [211].As conventional CMOS is also suffering from scaling constraints a high level of reliability was attained by an RRAM PUF based on two transistors two RRAM (2T2R) cells [212].…”