A fully digital multimode polar transmitter employing 17b RF DAC in 3G mode

Boos, Z.; Menkhoff, Andreas; Kuttner, F.; Schimper, Markus; Moreira, Jose; Geltinger, H.; Gossmann, Timo; Pfann, Peter; Belitzer, Alexander; Bauernfeind, Thomas

doi:10.1109/isscc.2011.5746361

Cited by 84 publications

(44 citation statements)

References 4 publications

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“…Figure 1 depicts a high level view of a state-of-the-art single band LTE RF transceiver. Here the transmit (Tx) signal is generated by a polar transmitter where the phase-modulated output of the phase locked loop (PLL) is combined with an amplitude-modulated signal and fed to the power amplifier (PA) [2]. The phase-and amplitude modulation information of the Tx signal are provided by the digital front-end (DFE).…”

Section: Fig 1 Block Diagram Of An Lte Transceiver Employing a Polamentioning

confidence: 99%

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Digitally-intensive transceivers for future mobile communications—emerging trends and challenges

Kanumalli

Buckel

Preissl

et al. 2018

Elektrotech. Inftech.

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This article presents an overview of the major trends and challenges involved with the design of multi-band, multi-standard digitallyintensive radio frequency transceivers for next generation mobile communications. In addition, we discuss in detail one aspect of the implementation challenges, namely the occurrence and cancellation of self-interference especially in carrier aggregation modes. For that, we present a novel digital cancellation technique to jointly compensate the self-interference caused by transmit (Tx) modulated spurs and Tx second order intermodulation distortion products (IMD2) in the receiver. This architecture exploits the underlying relation between both types of interference and offers a low-complexity solution to mitigate the Tx-IMD2 interference. Simulation results show, that the proposed technique significantly suppresses both types of interference and restores the signal-to-noise ratio of the wanted signal within 0.3 dB from its value in the absence of interference, thereby achieving 30 dB of cancellation.Keywords: RF; mobile communications; wireless communications; signal processing; interference cancellation; carrier aggregation Digital unterstützte Hochfrequenz-Transceiver für den Mobilfunk der Zukunft -Trends und Herausforderungen. Dieser Artikel gibt zunächst einen Überblick über aktuellen Trends und Herausforderungen bei der Entwicklung von Multi-Band, Multi-Standard HF-Transceivern für die nächste Mobilfunk-Generation, die einen hohen Anteil an digitaler Elektronik aufweisen. Im Anschluss wird im Detail auf ein spezielles Problem solcher Transceiver eingegangen, nämlich der Selbst-Interferenz, die durch den eigenen Sender verursacht wird und die vor allem im Carrier Aggregation-Modus auftritt. Die Problematik wird nicht nur detailliert erklärt, diese Arbeit präsentiert auch eine Methode zur Unterdrückung von Selbst-Interferenz mit den Mitteln der digitalen

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Section: Fig 1 Block Diagram Of An Lte Transceiver Employing a Polamentioning

confidence: 99%

“…RF-DPLL based phase modulators covering a multitude of cellular frequency bands, standards and modulation schemes are presented e.g. in [2,4].…”

Section: Rf Digital-pllmentioning

confidence: 99%

Digitally-intensive transceivers for future mobile communications—emerging trends and challenges

Kanumalli

Buckel

Preissl

et al. 2018

Elektrotech. Inftech.

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“…Recently, a highly digital RF-DAC based transmitter exhibiting high linearity was proposed in Ref. [31]. The work demonstrated multi-band operation in 3G using a polar architecture, in which separate phase and amplitude paths were derived from the baseband digital signal.…”

Section: Towards Rf Synthesismentioning

confidence: 99%

Current and Emerging Trends in the Design of Digital-to-Analog Converters

Balasubramanian

Patel

Khalil

2013

Design, Modeling and Testing of Data Converters

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The advent of digital computing, coupled with the continued scaling of CMOS devices, has led to the rapid growth in theory and applications of digital signal processing (DSP). In order to leverage the available increase in speed, complexity, and integration, high-performance analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) are needed to ensure the highest signal fidelity when moving between the analog and digital domains. Traditionally, high-speed ADCs have attracted more attention in the research and scientific community than their DAC counterparts, mainly due to the inherent shift towards receivers in the study and analysis of radio systems [1].This chapter aims to describe some of the design challenges and emerging trends for high-speed and high-resolution digital-to-analog converters. Section 3.1 presents an overview of the digital-to-analog conversion process. Section 3.2 delves into DAC characterization by outlining different sources of error and metrics used to quantify the DAC performance. A summary of DAC topologies and circuit limitations in the context of current-steering (CS) DACs is provided in Sects. 3.3 and 3.4, respectively. Section 3.5 details four major considerations in the design space of CS DACs. Realizing that the segmented architecture is the de facto standard in high-resolution DACs, a supplemental approach to segmentation is presented in Sect. 3.6. An in-depth survey of current and emerging architectural trends in high-performance DACs is discussed in Sect. 3.7. Finally, Sect. 3.8 concludes with a summary and a brief discussion on future directions.

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“…With the success of the all-digital techniques for RF frequency synthesis in all-digital PLL (ADPLL) [29] and the apparition of digital PA concept showing direct reconstruction of the signal envelope in the RF domain, mostly digital transmitters have been demonstrated such as digital polar transmitter [30] and digital transmitter using direct modulation [31]. Although the design of almost digital transmitter is not as challenging than that of frequency-agile receiver, some issues are still remaining, especially decreased ACLP, increased PA efficiency using digital predistortion technique.…”

Section: Rf Front-ends Transceiver Challengesmentioning

confidence: 99%

“…Almost digital RF transmitters employ an RF-DAC [30,31]. Although some improvements are still encouraged, the design is less challenging than that of ADCs.…”

Section: Adc and Dac Challengesmentioning

confidence: 99%

Cognitive Radio RF: Overview and Challenges

Nguyen

Villain²,

Guillou³

2012

VLSI Design

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Cognitive radio system (CRS) is a radio system which is aware of its operational and geographical environment, established policies, and its internal state. It is able to dynamically and autonomously adapt its operational parameters and protocols and to learn from its previous experience. Based on software-defined radio (SDR), CRS provides additional flexibility and offers improved efficiency to overall spectrum use. CRS is a disruptive technology targeting very high spectral efficiency. This paper presents an overview and challenges of CRS with focus on radio frequency (RF) section. We summarize the status of the related regulation and standardization activities which are very important for the success of any emerging technology. We point out some key research challenges, especially implementation challenges of cognitive radio (CR). A particular focus is on RF front-end, transceiver, and analog-to-digital and digital-to-analog interfaces which are still a key bottleneck in CRS development.

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A fully digital multimode polar transmitter employing 17b RF DAC in 3G mode

Cited by 84 publications

References 4 publications

Digitally-intensive transceivers for future mobile communications—emerging trends and challenges

Digitally-intensive transceivers for future mobile communications—emerging trends and challenges

Current and Emerging Trends in the Design of Digital-to-Analog Converters

Cognitive Radio RF: Overview and Challenges

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