A Fully Integrated 2 $\times$ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS

Deguchi, Jun; Miyashita, Daisuke; Ogasawara, Yosuke; Takemura, Gaku; Iwanaga, Masaomi; Sami, Kenichi; Ito, Ryoko; Wadatsumi, Junji; Tsuda, Y.; Oda, Shinichiro; Kawaguchi, Shigeru; Hamada, Mototsugu

doi:10.1109/jssc.2010.2075295

Cited by 19 publications

(9 citation statements)

References 20 publications

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“…The notch at À50.5 dBm input signal level is caused by the 18 dB gain drop, where a À29 dB EVM ensures received signal quality as predicted. In this case, the performance comparison between this work in Band 40 (2.3~2.4 GHz) and some recently published wideband CMOS WiMAX or WLAN receivers in close operating band (2.3~2.7 GHz) [21][22][23][24] is conducted in Table V. A maximum of 2.4 dB SINR degradation is found, indicating the performance not significantly degraded with all interferences presented scenes.…”

Section: Resultsmentioning

confidence: 84%

“…To our best knowledge, this is the first research paper on TD-LTE receiver IC design, and thus it is hard to make a fair performance comparison. In this case, the performance comparison between this work in Band 40 (2.3~2.4 GHz) and some recently published wideband CMOS WiMAX or WLAN receivers in close operating band (2.3~2.7 GHz) [21][22][23][24] is conducted in Table V. Although the proposed design has higher integration (with ADC), it achieves a lower power consumption than these state-of-the-art works.…”

Section: Resultsmentioning

confidence: 99%

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A power‐area‐efficient, 3‐band, 2‐RX MIMO, TD‐LTE receiver with direct‐coupled ADC

Huang

Chen

Wang

et al. 2014

Circuit Theory & Apps

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In this work, a power-area-efficient, 3-band, 2-RX MIMO, and TD-LTE (backward compatible with the HSPA+, HSUPA, HSDPA, and TD-SCDMA) CMOS receiver is presented and implemented in 0.13-μm CMOS technology. The continuous-time delta-sigma A/D converters (CT ΔΣ ADCs) are directly coupled to the outputs of the transimpedance amplifiers, eliminating the need of analog anti-aliasing filters between RX front-end and ADCs in conventional structures. The strong adjacent channel interference without lowpass filter attenuation is handled by proper gain control. A low-power small-area solution for excess loop delay compensation is implemented in the CT ΔΣ ADC. At 20 MHz bandwidth, the CT ΔΣ ADC achieves 66 dB dynamic range and 3.5 dB RX chip noise figure is measured. A maximum of 2.4 dB signal-to-noise ratio degradation is measured in all the adjacent channel selectivity (ACS) and blocking tests, demonstrating the effectiveness of the strategy against the low-pass filter removal from the conventional architecture. The receiver dissipates a maximum of 171 mW at 2-RX MIMO mode. To our best knowledge, it is the first research paper on the design of fully integrated commercial TD-LTE receiver.

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Section: Resultsmentioning

confidence: 84%

Section: Resultsmentioning

confidence: 99%

A power‐area‐efficient, 3‐band, 2‐RX MIMO, TD‐LTE receiver with direct‐coupled ADC

Huang

Chen

Wang

et al. 2014

Circuit Theory & Apps

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“…However, this technique typically requires an LC bandpass filter or digital calibration to suppress the lower sideband spurs. In [20], a further modification was introduced, called inductor-less LO distribution, which eliminates filtering of harmonics in the LO path while not increasing the noise levels. However, that technique uses complicated analog circuits and consumes large area.…”

Section: A Fractional Dividermentioning

confidence: 99%

Toward Solving Multichannel RF-SoC Integration Issues Through Digital Fractional Division

Mehr

Tohidian

Staszewski

2016

IEEE Trans. VLSI Syst.

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In modern RF system on chips (SoCs), the digital content consumes up to 85% of the IC chip area. The recent push to integrate multiple RF-SoC cores is met with heavy resistance by the remaining RF/analog circuitry, which creates numerous strong aggressors and weak victims leading to RF performance degradation. A key such mechanism is injection pulling through parasitic coupling between various LC-tank oscillators as well as between them and strong transmitter (TX) outputs. Any static or dynamic frequency proximity between aggressors (i.e., oscillators and TX outputs) and victims (i.e., oscillators) that share the same die causes injection pulling, which produces unwanted spurs and/or modulation distortion. In this paper, we propose and demonstrate a new frequency planning technique of a multicore TX where each LC-tank oscillator is separated from other aggressors beyond its pulling range. This is done by breaking the integer harmonic frequency relationship of victims/aggressors within and between the RF transmission channels using digital fractional divider based on a phase rotation. Each oscillator's center frequency can be fractionally separated by ∼28% but, at the same time, both producing closely spaced frequencies at the phase rotator outputs. The injection-pulling spurs are so far away that they are insignificantly small (−80 dBc) and coincide with the second harmonic of the carrier. This method is experimentally verified in a two-channel system in 65-nm digital CMOS, each channel comprising a high-swing class-C oscillator, frequency divider, and phase rotator.

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“…In this way, the design of the OpAmp is relaxed and its performance no longer needs to be a bottleneck. The use of a negative conductance has been proposed in [10] to realize TIA flicker noise shaping. Paper [10] also briefly mentions linearity improvement, but linearity benefits were not the focus there.…”

Section: Introductionmentioning

confidence: 99%

“…The use of a negative conductance has been proposed in [10] to realize TIA flicker noise shaping. Paper [10] also briefly mentions linearity improvement, but linearity benefits were not the focus there. In this paper we will analyze the benefits of a negative conductance, compare analysis to measurements and report some extra experimental results in addition to [9].…”

Section: Introductionmentioning

confidence: 99%

Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity

Mahrof

Klumperink

et al. 2014

IEEE J. Solid-State Circuits

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High linearity CMOS radio receivers often exploit linear V-I conversion at RF, followed by passive down-mixing and an OpAmp-based Transimpedance Amplifier at baseband. Due to nonlinearity and finite gain in the OpAmp, virtual ground is imperfect, inducing distortion currents. This paper proposes a negative conductance concept to cancel such distortion currents. Through a simple intuitive analysis, the basic operation of the technique is explained. By mathematical analysis the optimum negative conductance value is derived and related to feedback theory. In-and out-of-band linearity, stability and Noise Figure are also analyzed. The technique is applied to linearize an RF receiver, and a prototype is implemented in 65 nm technology. Measurement results show an increase of in-band IIP 3 from 9dBm to >20dBm, and IIP2 from 51 to 61dBm, at the cost of increasing the noise figure from 6 to 7.5dB and <10% power penalty. In 1MHz bandwidth, a Spurious-Free Dynamic Range of 85dB is achieved at <27mA up to 2GHz for 1.2V supply voltage.

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A Fully Integrated 2 $\times$ 1 Dual-Band Direct-Conversion Mobile WiMAX Transceiver With Dual-Mode Fractional Divider and Noise-Shaping Transimpedance Amplifier in 65 nm CMOS

Cited by 19 publications

References 20 publications

A power‐area‐efficient, 3‐band, 2‐RX MIMO, TD‐LTE receiver with direct‐coupled ADC

A power‐area‐efficient, 3‐band, 2‐RX MIMO, TD‐LTE receiver with direct‐coupled ADC

Toward Solving Multichannel RF-SoC Integration Issues Through Digital Fractional Division

Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity

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