A Fully Integrated Bluetooth Low-Energy Transmitter in 28 nm CMOS With 36% System Efficiency at 3 dBm

Abstract

We propose a new transmitter architecture for ultra-low power radios in which the most energy-hungry RF circuits operate at a supply just above a threshold voltage of CMOS transistors. An all-digital PLL employs a digitally controlled oscillator with switching current sources to reduce supply voltage and power without sacrificing its startup margin. It also reduces 1/f noise and supply pushing, thus allowing the ADPLL, after settling, to reduce its sampling rate or shut it off entirely during a direct DCO data modulation. The switching power amplifier integrates its matching network while operating in class-E/F2 to maximally enhance its efficiency at low voltage. The transmitter is realized in 28 nm digital CMOS and satisfies all metal density and other manufacturing rules. It consumes 3.6 mW/5.5 mW while delivering 0 dBm/3 dBm RF power in Bluetooth Low-Energy mode.

A 0.5-V 1.6-mW 2.4-GHz Fractional-N All-Digital PLL for Bluetooth LE With PVT-Insensitive TDC Using Switched-Capacitor Doubler in 28-nm CMOS

“…1(b). The supply voltage reduction results in significant power savings for the most power-hungry block, i.e., DCO [6], [8], and enables it to be supplied directly from energy harvesters. On the other hand, the TDC and all digital blocks, which consume relatively much less, are supplied from the proposed SC dc-dc converter that regulates the supply of TDC (and all other digital circuitry) to maintain the ADPLL's PN performance across voltage and temperature variations.…”

“…2) can be engaged right after the loop is settled to scale down the ADPLL's effective reference clock rate f R from 40 to 5 MHz or even lower, which reduces the dynamic power drain of digital logic while proportionately deteriorating the in-band PN, as L IB ∝ 1/ f R . In addition, once the ADPLL acquires the lock, the digital part of ADPLL can be shut down, thus ultimately improving the power efficiency [6]. The openloop operation relies on the system tolerance to frequency drift, which must be well below the BLE limit of 400 Hz/μs [9].…”

“…This is likely to degrade performance of important ADPLL building blocks. Supply voltage of ADPLL (a) in prior art design (see [6]). (b) Proposed solution.…”

“…In [6], new system and circuit techniques were exploited to enhance efficiency of an ADPLL-based Bluetooth lowenergy (BLE) transmitter. Although a digitally controlled oscillator (DCO) and an output stage of a power amplifier (PA) are designed in such a way as to operate directly at the low voltage of harvesters (i.e., ∼0.5 V), the rest of ADPLL blocks still need ∼1 V to operate, as shown in Fig.…”

Comparison of the Low Power Wireless Technologies for Smart Refuelling

“…Selecting the technology: To build an advanced and smart wireless system, mostly the two frequency bands of industrial, scientific, and medical (ISM) radio band options that are 2.4GHz or sub-GHz frequencies will be chosen. By pairing one or other according to the requirement can provide the best combination of the wireless performance and also the economy [5].…”