A Fully Integrated Quad-Band GSM/GPRS CMOS Power Amplifier

Abstract

Abstract-Concentric distributed active transformers (DAT) are used to implement a fully-integrated quad-band power amplifier (PA) in a standard 130 nm CMOS process. The DAT enables the power amplifier to integrate the input and output matching networks on the same silicon die. The PA integrates on-chip closedloop power control and operates under supply voltages from 2.9 V to 5.5 V in a standard micro-lead-frame package. It shows no oscillations, degradation, or failures for over 2000 hours of operation with a supply of 6 V at 135 C under a VSWR of 15:1 at all phase angles and has also been tested for more than 2 million device-hours (with ongoing reliability monitoring) without a single failure under nominal operation conditions. It produces up to +35 dBm of RF power with power-added efficiency of 51%.Index Terms-CMOSFET power amplifiers, CMOS RF, distributed active transformer (DAT), global system for mobile communications (GSM), power control, reliability.

A Review of Watt-Level CMOS RF Power Amplifiers

“…However, a 3G RF transceiver with integrated PA in 65 nm was recently presented by Intel [17] although detailed specifications have not been released. Standalone 2G handset integrated CMOS-PAs have been commercially available on the market for a number of years [18]- [21]. For 3G (WCDMA) PAs, the groundbreaking work has been done by startup companies, such as Amalfi Semiconductor (now acquired by RFMD), Black Sand Technologies [22], and Javelin Semiconductor (now acquired by Avago) [23], [24].…”

CMOS Integrated Switched-Mode Transmitters for Wireless Communication

“…As limited supply voltage is one of the major challenges in CMOS PA design, other strategies have been used to effectively add the output voltages, such as using a transformer to combine output power (Aoki et al, 2008;Haldi et al, 2008) or stacking devices, making sure that the voltage over each device stays below the maximum (Stauth & Sanders, 2008;Jeong et al, 2006). However, generally this slightly impairs the efficiency, counteracting the intended advantage of a higher supply voltage.…”

The future of high frequency circuit design

“…This is mainly due to the lower transistor breakdown voltages resulting from the scaling process and the shrinking of the depletion regions in the transistors, which necessitates the use of a lower power supply voltage. Unfortunately, this is in direct conflict with the maximum power that can be generated using conventional power amplifier techniques, which makes it almost inevitable to use parallel structures and novel power combing approaches, as described in [13] [14] and [28]- [31]. These approaches in turn are more susceptible .to different energy loss mechanism in passive devices that were dIScussed earlier.…”