A Gate Driver with Integrated Dead-Time Controller

Grezaud, Romain; Ayel, François; Rouger, Nicolas; Crébier, Jean-Christophe

doi:10.1109/tpel.2016.2517679

Cited by 31 publications

(27 citation statements)

References 34 publications

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“…This, in turn, improves circuit performance, minimising overshoots and ringing, and allows better utilisation of the high-speed features of GaN FETs. It also permits the integration of functions that involve both power devices, such as dead-time optimisation [6].…”

Section: Introductionmentioning

confidence: 99%

Building blocks for future dual-channel GaN gate drivers: Arbitrary waveform driver, bootstrap voltage supply, and level shifter

Liu

Dymond

Wang

et al. 2019

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)

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Capitalising on the high-speed switching capability of 650 V GaN FETs in power-electronic bridgelegs is challenging. Whilst active gate driving has previously been shown to help overcome adverse switching behaviour, the best results are likely to be achieved through a combination of uncompromised circuit layout and active gate driving. A fully integrated dual-channel driver would minimise external circuitry and allow power devices to be placed as close together as possible. This would facilitate simultaneous minimization of parasitic inductances in the gate-drive and power-circuit loops. Other benefits would include ease of use, lower BOM cost, and providing a step towards full integration of driver and power stage. This paper presents three circuit blocks vital to the implementation of a fully integrated dual-channel gate driver-A 100 ps resolution, digitally-controlled active gate driver IC, a sub-ns propagation delay level shifter with 200 V/ns slew-rate immunity, and a regulated bootstrap supply that maintains its output voltage regardless of any switch-node undershoot during switching events. Measurement results show the efficacy of the high-resolution active gate driver in a GaN bridge leg, and the sub-ns propagation delay of the level shifter, both fabricated in a 50 V CMOS process. Simulation results demonstrate the slew-immunity of the level shifter, and operation of the bootstrap supply. It is also inferred how to increase the voltage rating of the level-shifter and bootstrap without adversely affecting performance.

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Section: Introductionmentioning

confidence: 99%

Building blocks for future dual-channel GaN gate drivers: Arbitrary waveform driver, bootstrap voltage supply, and level shifter

Liu

Dymond

Wang

et al. 2019

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)

View full text Add to dashboard Cite

show abstract

“…The full-bridge topology is generally used in the post stage of high-frequency isolated inverter for dc-ac voltage conversion, which possesses shortcomings of high-side switch driver necessity, shoot-through issue and high conduction loss [1,2,3,4]. In order to solve these problems, the Watkins-Johnson (WJ) topology provides an alternative approach to realizing inverter.…”

Section: Introductionmentioning

confidence: 99%

Improved Watkins-Johnson topology-based inverter with dual low-side switch and synchronous control strategy

Wei

2018

IEICE Electron. Express

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Abstract:The full-bridge topology is generally used in the post stage of inverter, to realize dc-ac voltage conversion. Inherent shortcomings of full-bridge such as high-side switch driving, prone to shoot-through and substantial power loss are inevitable. A topological solution is proposed in this letter, by means of improving the original coupledinductor Watkins-Johnson topology into dual low-side switch version and conducting synchronous control. Theoretical analysis and experimental results indicate that the improved topology is capable of generating pure sinusoidal ac output. The merits include ease of driving, low power loss, nonpulsating terminal currents, immunity to shoot-through, simple control strategy and so forth.

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“…Furthermore, other issues like leakage currents should be considered. For instance, a short period, called dead time, has to be implemented in the Pulse Width Modulation (PWM) drivers or modulation strategies during each switching interval [9]- [13]. This is to avoid any shoot-through incident in the converter, and clearly, larger dead time is safer.…”

Section: Introductionmentioning

confidence: 99%

“…However, those methods rely on the detection of current polarity, and thus noise at zero-crossing of the current will degrade the compensation performance. Other solutions have also been reported in the literature [9]- [13], [16], [22]. For example, a compensation method using the controller integrator output and an adaptive dead time compensator were introduced in [16] and [22], respectively.…”

Section: Introductionmentioning

confidence: 99%

Analysis of dead-time harmonics in single-phase transformerless full-bridge PV inverters

Yang

Zhou

Blaabjerg

2018

2018 IEEE Applied Power Electronics Conference and Exposition (APEC)

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Abstract-A short period, called dead time, is usually implemented (e.g., through adding extra hardware in gate drivers or modifying pulse-width modulation schemes) for voltage source inverters to prevent shoot-through incidents. Clearly, larger dead time provides more safety, but may also degrade the injected currents from inverters. It thus requires sophisticated compensation schemes to meet certain stringent standards. For single-phase transformerless full-bridge PV inverters, different modulation schemes can be employed to suppress leakage currents, which in return may affect the distribution of the dead time harmonics. Thus, this drives the analysis of dead time harmonics in single-phase transformerless full-bridge inverters considering two modulation strategies: bipolar and unipolar modulation schemes. Effects of modulation on the dead time harmonics are observed in simulations and experimental tests. Furthermore, a periodic controller is adopted to mitigate the harmonics, which is independent of the modulation schemes.

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A Gate Driver with Integrated Dead-Time Controller

Cited by 31 publications

References 34 publications

Building blocks for future dual-channel GaN gate drivers: Arbitrary waveform driver, bootstrap voltage supply, and level shifter

Building blocks for future dual-channel GaN gate drivers: Arbitrary waveform driver, bootstrap voltage supply, and level shifter

Improved Watkins-Johnson topology-based inverter with dual low-side switch and synchronous control strategy

Analysis of dead-time harmonics in single-phase transformerless full-bridge PV inverters

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