A generic analytical model of switching characteristics for efficiency-oriented design and optimization of CMOS integrated buck converters

Modak, Rohit; Baghini, Maryam Shojaei

doi:10.1109/icit.2009.4939579

Cited by 10 publications

(7 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The current in the power path of the converter is a superposition of the triangular ripple current  and DC load current I load . Equations (2) and (3) describe the losses in the power FET and the inductor, respectively,…”

Section: A Analytic Efficiency Modelmentioning

confidence: 99%

“…A buck converter needs to operate at high switching frequencies (hundreds of MHz). Existing work on analytic modeling of integrated DC-DC converter efficiency [2][3][4][5] does not properly address the combination of high switching frequencies and air-core inductor properties. Consequently, a need for considering high frequency effects, such as the skin effect, arises.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Frequency dependent efficiency model of on-chip DC-DC buck converters

Sizikov

Kolodny

Fridman

et al. 2010

2010 IEEE 26-Th Convention of Electrical and Electronics Engineers in Israel

View full text Add to dashboard Cite

An analytic method to evaluate frequency dependent losses in on-chip DC-DC buck converters is presented in this paper. These converters feature high switching losses caused by the skin effect in the package inductors. The frequency dependent air-core inductor model is shown to be critical in determining the optimal switching frequency. A general RLC parameter extraction method is also described. Considering the skin effect results in a 15% reduction in overall DC-DC converter losses. The proposed approach focuses on decreasing ripple current related losses, which are dominant in the target operating condition. Consequently, to obtain optimal efficiency, the switching frequency increases as the load current decreases. An intuitive explanation for this surprising result is that switching losses rise linearly with frequency whereas ripple losses decrease as n 1. . A SPICE based circuit model of a DC-DC converter is applied to validate the proposed analytic method. (Abstract)Keywords-on chip DC-DC; frequency dependent losses buck converter efficiency; air core inductor (keywords)

show abstract

Section: A Analytic Efficiency Modelmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Frequency dependent efficiency model of on-chip DC-DC buck converters

Sizikov

Kolodny

Fridman

et al. 2010

2010 IEEE 26-Th Convention of Electrical and Electronics Engineers in Israel

View full text Add to dashboard Cite

show abstract

“…The switching frequency can be optimized independent of the load current using only P cvf and P ripple (see (2), (4), and (5)). Differentiating P cvf and P ripple with respect to f sw , , marked f, and equating to zero results in …”

Section: Optimization Of Switching Frequencymentioning

confidence: 99%

“…A buck converter needs to operate at high switching frequencies (hundreds of MHz) for the inductor to be sufficiently small. Existing work on analytic modeling of integrated DC-DC converter efficiency [2][3][4][5] does not properly address the combination of high switching frequencies and air-core inductors. Consequently, a need for considering high frequency effects, such as the skin effect, arises.…”

Section: Introductionmentioning

confidence: 99%

Efficiency optimization of integrated DC-DC buck converters

Sizikov

Kolodny

Fridman

et al. 2010

2010 17th IEEE International Conference on Electronics, Circuits and Systems

View full text Add to dashboard Cite

-An analytic method to evaluate frequency dependent losses in on-chip DC-DC buck converters is presented in this paper. Microprocessors or chipsets exhibit wide dynamic range of load current varying from 50mA up to 1.5 A per phase at full operation. Peak efficiency is shown to occur when the load current related losses and the inherent losses of the DC-DC converter are equal. Efficiency optimization methods are described for light and heavy load scenarios. The primary design objective is to maintain the load at the peak of the efficiency curve. A SPICE based circuit model of a DC-DC converter is applied to validate the proposed analytic methods.

show abstract

“…To achieve a constant output voltage, classical linear design of a control is often used. Voltage regulation is normally achieved by the pulse width modulation (PWM) technique [6], [7].…”

Section: Introductionmentioning

confidence: 99%

Analysis and control of DC-DC Buck converter using average power balance control (APBC)

Kollimalla

Mishra

2012

2012 IEEE Third International Conference on Sustainable Energy Technologies (ICSET)

View full text Add to dashboard Cite

In this paper, average power balance control (APBC) scheme is designed and analyzed for a buck converter. The proposed scheme consists of two control loops, the fast inner current loop uses sliding mode control (SMC) and outer voltage loop uses the average power balance algorithm (APBA), which contains average power balance equation (APBE) and PI controller. The existence condition of SMC is derived using Lyapunov stability theorem such that the stable tracking performance can be ensured under occurrence of system uncertainties. The proposed APBC scheme is modelled and simulated using MATLAB / SIMULINK. The effectiveness of APBC in terms of voltage tracking, transient response and robustness to uncertainties in parameters are verified by simulation results.Index Terms-Buck converter, Lyapunov theorem, average power balance control (APBC), average power balance equation (APBE), sliding mode control (SMC), proportional integral control (PIC).

show abstract

A generic analytical model of switching characteristics for efficiency-oriented design and optimization of CMOS integrated buck converters

Cited by 10 publications

References 7 publications

Frequency dependent efficiency model of on-chip DC-DC buck converters

Frequency dependent efficiency model of on-chip DC-DC buck converters

Efficiency optimization of integrated DC-DC buck converters

Analysis and control of DC-DC Buck converter using average power balance control (APBC)

Contact Info

Product

Resources

About