A geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs

Serafy, Caleb; Shi, Bing; Srivastava, Ankur

doi:10.1016/j.vlsi.2013.11.004

Cited by 11 publications

(29 citation statements)

References 12 publications

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“…In addition to changing the electrical parameters of the coupling path as discussed in Section 2.1, another way to reduce coupling between TSVs is to insert shields between them [7,5]. A shield can be any piece of conductive material which blocks the propagation of EM fields in a circuit.…”

Section: Shieldingmentioning

confidence: 99%

“…In this work we will show that using both techniques together can improve signal integrity much more than using either technique alone, and that the two techniques actually increase each other's effectiveness. Previous work has developed a geometric model of TSV coupling which considers the effects of shields [7], and we use this model to estimate coupling parameters in this work.…”

Section: Shieldingmentioning

confidence: 99%

“…Beyond the coupling mitigation provided by coupling-aware TSV placement, the algorithm also performs shield insertion, leading to better results than could be produced using either method on its own. Shielding is achieved by adding undriven TSVs to the layout [7], but requires reserving additional whitespace during the transistor placement stage. The models used for estimating TSV coupling and the algorithm used for shield insertion were developed in previous work [7].…”

Section: Introductionmentioning

confidence: 99%

“…Shielding is achieved by adding undriven TSVs to the layout [7], but requires reserving additional whitespace during the transistor placement stage. The models used for estimating TSV coupling and the algorithm used for shield insertion were developed in previous work [7].…”

Section: Introductionmentioning

confidence: 99%

“…Section 3 presents our TSV placement algorithm which includes a shield insertion algorithm from [7]. Experimental setups and results from our analysis are presented in Section 4, where we compare TSV placement with and without couplingawareness, and with and without shield insertion.…”

Section: Introductionmentioning

confidence: 99%

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Coupling-aware force driven placement of TSVs and shields in 3D-IC layouts

Serafy

Srivastava

2014

Proceedings of the 2014 on International Symposium on Physical Design

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In 3D ICs, TSV cross coupling can seriously degrade circuit performance if it is not sufficiently considered in a design. Cross coupling is heavily dependent on how TSVs are placed, and should be considered during the floorplanning of the chip. In this work we propose a coupling-aware TSV placement algorithm that attempts to reduce both wirelength and TSV cross coupling. TSV shielding is another method for coupling mitigation, and the proposed algorithm combines coupling-aware TSV placement with shield insertion to yield better results than either technique alone. With regard to the most heavily coupled TSV pair in a design, our results show that applying both techniques simultaneously produces a 12.3% improvement in maximum S-parameter compared to traditional TSV placement which optimizes wirelength only. Using coupling-aware TSV placement or shield insertion alone produces a 4.2% and 4.8% improvement respectively. The improvement offered by using both techniques simultaneously is actually more than the sum of the improvement offered by using each technique on its own. This implies that the two techniques are not independent of one another, and that when used simultaneously each technique increases the effectiveness of the other, giving strong motivation for using them both simultaneously. Furthermore, the percent increase in wirelength due to using these two techniques is an order of magnitude less than the percent improvement to coupling, justifying the tradeoff made by our algorithm.

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Section: Shieldingmentioning

confidence: 99%

Section: Shieldingmentioning

confidence: 99%