A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics

Das, Satyajit; Martin, Kévin; Coussy, Philippe; Rossi, Davide

doi:10.1109/iscas.2018.8351749

Cited by 17 publications

(35 citation statements)

References 8 publications

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“…However, [31] does not focus on the three key features' comparison for the CGRAs. For understanding the performance between CGRAs and figuring out which architectures are the potential candidates for edge AI accelerators, this paper presents architectures [32][33][34][35][36][37][38][39][40][41][42] published in the recent few years for comparison. The units or reference standards are different in each architecture so that this paper consults the references and converts the various units to be standardized according to the revealed information of each architecture in Table 5-7.…”

Section: Coarse-grained Cell Array Acceleratorsmentioning

confidence: 99%

“…However, the revealed size of [40] is only part of the architecture, so edge AI designers should be more conservative in assessing specific architecture specifications. [42] does not release its computation ability. Since [42] shares the same architecture with [45], the operation/power ratio in [45] can be the reference.…”

Section: Coarse-grained Cell Array Acceleratorsmentioning

confidence: 99%

See 1 more Smart Citation

Low-power ultra-small Edge AI Accelerators for Image Recognition with Convolution Neural Networks: Analysis and Future Directions

Lin¹,

Adetomi²,

Arslan³

2021

Preprint

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Edge AI accelerators have been emerging as a solution for near customers’ applications in areas such as unmanned aerial vehicles (UAVs), image recognition sensors, wearable devices, robotics, and remote sensing satellites. These applications not only require meeting performance targets but also meeting strict reliability and resilience constraints due to operations in harsh and hostile environments. Numerous research articles have been proposed, but not all of these include full specifications. Most of these tend to compare their architecture with other existing CPUs, GPUs, or other reference research. This implies that the performance results of the articles are not comprehensive. Thus, this work lists the three key features in the specifications such as computation ability, power consumption, and the area size of prior art edge AI accelerators and the CGRA accelerators during the past few years to define and evaluate the low power ultra-small edge AI accelerators. We introduce the actual evaluation results showing the trend in edge AI accelerator design about key performance metrics to guide designers on the actual performance of existing edge AI accelerators’ capability and provide future design directions and trends for other applications with challenging constraints.

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Section: Coarse-grained Cell Array Acceleratorsmentioning

confidence: 99%

Section: Coarse-grained Cell Array Acceleratorsmentioning

confidence: 99%

Low-power ultra-small Edge AI Accelerators for Image Recognition with Convolution Neural Networks: Analysis and Future Directions

Lin¹,

Adetomi²,

Arslan³

2021

Preprint

View full text Add to dashboard Cite

show abstract

“…The PULP [159] cluster system features a 16 RC mesh to improve performance and energy-consumption for nearsensor data analytics. The CGRA (called IPA [160]) is standard in the design and adopts most concepts that we have described so far, with the RCs connected in a torus fashion.…”

Section: F Low-power Cgrasmentioning

confidence: 99%

A Survey on Coarse-Grained Reconfigurable Architectures From a Performance Perspective

2020

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“…Thanks to this design, they can efficiently exploit both instruction-level parallelism (ILP) and data parallelism (DP). CGRAs have been designed as accelerators coupled to a host CPU [6]; however, the proposed solutions lack support for FP operations. Research works have discussed the role of CGRAs to employ approximate computing and SIMD, or even the adoption of multiple approximation modes to further exploit DP.…”

Section: Related Workmentioning

confidence: 99%

“…In this emerging era of the Internet of Things (IoT), there is an ever-increasing demand for ultra-low-power and energyefficient computing architectures. In this scenario, most of the promising approaches to improve performance and energy efficiency of these platforms exploit parallelism [23], reconfigurability [6], and heterogeneity [11] to fit with the workloads for near-sensor IoT end nodes. Studies of more than a decade have shown that Coarse Grain Reconfigurable Architectures (CGRAs) can provide silicon efficiency approaching that of Application-Specific Integrated Circuit (ASIC) by exploiting spatial computation typical of dedicated hardware while keeping programmability typical of instruction processors [5].…”

Section: Introductionmentioning

confidence: 99%

TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE

Prasad

Das

Martin

et al. 2020

2020 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

Self Cite

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In recent years, Coarse Grain Reconfigurable Architecture (CGRA) accelerators have been increasingly deployed in Internet-of-Things (IoT) end nodes. A modern CGRA has to support and efficiently accelerate both integer and floating-point (FP) operations. In this paper, we propose an ultra-low-power tunableprecision CGRA architectural template, called TRANSprecision floating-point Programmable archItectuRE (TRANSPIRE), and its associated compilation flow supporting both integer and FP operations. TRANSPIRE employs transprecision computing and multiple Single Instruction Multiple Data (SIMD) to accelerate FP operations while boosting energy efficiency as well. Experimental results show that TRANSPIRE achieves a maximum of 10.06× performance gain and consumes 12.91× less energy w.r.t. a RISC-V based CPU with an enhanced ISA supporting SIMD-style vectorization and FP data-types, while executing applications for near-sensor computing and embedded machine learning, with an area overhead of 1.25× only.

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A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics

Cited by 17 publications

References 8 publications

Low-power ultra-small Edge AI Accelerators for Image Recognition with Convolution Neural Networks: Analysis and Future Directions

Low-power ultra-small Edge AI Accelerators for Image Recognition with Convolution Neural Networks: Analysis and Future Directions

A Survey on Coarse-Grained Reconfigurable Architectures From a Performance Perspective

TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE

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