A heterogeneous quantum computer architecture

Fu, Xiang; Riesebos, Leon; Lao, Lingling; Almudéver, Carmen G.; Foti, Sebastiano; Versluis, R.; Charbon, Edoardo; Bertels, Koen

doi:10.1145/2903150.2906827

Cited by 39 publications

(40 citation statements)

References 32 publications

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“…In [34] we propose a heterogeneous quantum computer architecture which supports all operations of a ninja star implemented with transmon qubits. Figure 3.10 shows a simplified version of the proposed architecture which mainly focuses on the Quantum Control Unit (QCU).…”

Section: Methodsmentioning

confidence: 99%

“…In the next sections, we will focus on the QCU and briefly discuss the main parts of this module. For more details about the proposed architecture, we refer to the original paper [34]. After this brief overview, we will focus on the PFU.…”

Section: Chapter 3 Pauli Framesmentioning

confidence: 99%

“…The second reason is that, as is explained in Section 2.5, a quantum computer requires very close monitoring and, if necessary, correction by classical logic. In [34] we present a high-level view of the quantum system stack consisting of multiple layers which are shown in Figure 4.1. The top layers represent the algorithms for which specific language constructs and compilers need to be developed such that the algorithms can exploit the underlying quantum hardware.…”

Section: Pauli Frame Unitmentioning

confidence: 99%

“…Finally, we would like to take a deeper look into our proposed quantum computer architecture [34]. Interesting work could be done by performing more accurate simulations of the quantum computer architecture up to a level where we perform clock-cycle accurate emulation.…”

Section: Future Workmentioning

confidence: 99%

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Pauli Frames for Quantum Computer Architectures

Riesebos

Varsamopoulos

et al. 2017

Proceedings of the 54th Annual Design Automation Conference 2017

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Quantum computers hold the promise to solve problems that are intractable to classical computers. Since qubits suffer from extremely short lifetime and unreliable operations, Quantum Error Correction (QEC) forms a vital part of a quantum computer to enable Fault-Tolerant quantum computing. The usage of a Pauli frame can relax the time constraints on QEC by keeping track of detected errors in classical logic. For the first time, in the background of a heterogeneous quantum computer architecture, we clarified the input/output and working principles of a Pauli frame, which can soon be mapped to a hardware implementation. We proposed the first functional quantum computer architecture simulation platform, QPDO, which can connect to different quantum simulators, such as QX Simulator or CHP, and is used to verify the logical operations of a Surface Code 17 (SC17) logical qubit. Finally, by using QPDO we found that a Pauli frame does not improve the Logical Error Rate (LER) of a SC17 logical qubit, which is opposite to previous understanding. By further reasoning, we also expect no improvement in LER by using a Pauli frame for surface codes with a larger distance. Nevertheless, the usage of a Pauli frame is still crucial for relaxing the timing constraints on QEC. Pauli Frames for Quantum Computer Architectures AbstractQuantum computers hold the promise to solve problems that are intractable to classical computers. Since qubits suffer from extremely short lifetime and unreliable operations, Quantum Error Correction (QEC) forms a vital part of a quantum computer to enable Fault-Tolerant quantum computing. The usage of a Pauli frame can relax the time constraints on QEC by keeping track of detected errors in classical logic. For the first time, in the background of a heterogeneous quantum computer architecture, we clarified the input/output and working principles of a Pauli frame, which can soon be mapped to a hardware implementation. We proposed the first functional quantum computer architecture simulation platform, QPDO, which can connect to different quantum simulators, such as QX Simulator or CHP, and is used to verify the logical operations of a Surface Code 17 (SC17) logical qubit. Finally, by using QPDO we found that a Pauli frame does not improve the Logical Error Rate (LER) of a SC17 logical qubit, which is opposite to previous understanding. By further reasoning, we also expect no improvement in LER by using a Pauli frame for surface codes with a larger distance. Nevertheless, the usage of a Pauli frame is still crucial for relaxing the timing constraints on QEC.

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Section: Methodsmentioning

confidence: 99%

Section: Chapter 3 Pauli Framesmentioning

confidence: 99%

Section: Pauli Frame Unitmentioning

confidence: 99%

Section: Future Workmentioning

confidence: 99%

See 2 more Smart Citations

Pauli Frames for Quantum Computer Architectures

Riesebos

Varsamopoulos

et al. 2017

Proceedings of the 54th Annual Design Automation Conference 2017

Self Cite

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“…Even with a fairly compact PCI-type form factor for a single qubit controller, the control electronics would fill thousands of racks. Furthermore, it poses a * l.geck@fz-juelich.de General architecture of a quantum computer, going from a high-level description of a quantum algorithm, to the actual physical operation of the qubits in a layered architecture [5].…”

Section: Introductionmentioning

confidence: 99%

Control electronics for semiconductor spin qubits

Geck

Kruth

Bluhm

et al. 2019

Quantum Sci. Technol.

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Future universal quantum computers solving problems of practical relevance are expected to require at least 10 6 qubits, which is a massive scale-up from the present numbers of less than 50 qubits operated together. Out of the different types of qubits, solid state qubits are considered to be viable candidates for this scale-up, but interfacing to and controlling such a large number of qubits is a complex challenge that has not been solved yet. One possibility to address this challenge is to use qubit control circuits located close to the qubits at cryogenic temperatures. In this work we evaluate the feasibility of this idea, taking as a reference the physical requirements of a two-electron spin qubit and the specifications of a standard 65 nm complementary metal-oxide-semiconductor (CMOS) process. Using principles and flows from electrical systems engineering we provide realistic estimates of the footprint and of the power consumption of a complete control-circuit architecture. Our results show that with further research it is possible to provide scalable electrical control in the vicinity of the qubit, with our concept.

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