A high-density logic CMOS process compatible non-volatile memory for sub-28nm technologies

Abstract

Various product applications bring up with increasing demands of logic NVM IP in advanced technology nodes. Encryption, security, functionality, and identification setting become indispensable in communication and high-end consumer electronics. A non-volatile memory cell, using anti-fuse programming mechanism to achieve high density and excellent data storage lifetime, is proposed. The unique cell design and operation scheme realize low programming-inhibit leakage current, fast program speed, and robust data retention. The memory macro is successfully demonstrated for one-time and multi-time programming applications with its full compatibility to sub-28nm and FinFET processes. IntroductionComparing with the use of commodity or stand-alone memory chips, products with embedded memory enhance the performance and reduce chip pin-counts, board space, and system cost. Embedded nonvolatile memory (NVM) has been widely used in consumer electronics, industrial and automotive applications for program code, firmware code, and data storage.Owing to the process simplicity of embedded logic process compatible NVM technology (logic-NVM), the technology and memory macro enable wider IP usages for: (1) identification or encryption data storage to achieve security or protection consideration, (2) storage of timing, parameter setting, function selection to achieve compact system design, and (3) the flexibility of field updates and product customization. Low/middle-end micro-controller unit (MCU) products have deployed logic-NVM for device ID, serial number setting, signal trimming and user parameter setting in a simpler and more cost-effective way. Now, logic-NVM is further adopted in key components of mobile device, such as CIS, DDI, PMU, AP, connectivity chip, etc., to minimize characteristic difference between chips by trimming and to calibrate system performance discrepancy by parameter setting. In addition, logic-NVM is also beneficial for security sensitivity applications, such as digital right protection and conditional access, which allow products to retain competitiveness. The IP usage of embedded NVM is illustrated in Figure 1.

A CMOS-compatible Non-volatile Memory Element using Fishbone-in-cage Capacitor

“…Although a standard CMOS process cannot fabricate a commonly used flash memory element with a double-gate structure, several attempts have been made to implement CMOS-processcompatible non-volatile memory elements, as summarized in Table 1. These can be classified into three types: anti-fuse memory elements [8]; CHEI-based memory elements [9], [10], [11], [12], [13], [14], [15]; and FN-tunneling-based memory elements [7].…”

“…Shen et al [8] proposed a one-time programmable (OTP) memory element using oxide rupture for 28 nm processes. Because its bit cell consists of two in-series transistors and a varactor, an area-efficient NOR-type array implementation is possible.…”

High-Density FinFET One-Time Programmable Memory Cell With Intra-Fin-Cell-Isolation Technology

“…Without cutting a fin between adjacent cells, the IFCI scheme is expected to be more scalable than conventional fin-cut isolation. Due to new clearance requirement between Fins, the cells reported in [1] and [2], using conventional isolation schemes, required much larger single cell area of 0.16μm 2 and 0.092μm 2 based on FinFET logic design rule, respectively. Compared to the above, IFCI enables the OTP cells to be effectively scaled in FinFET technologies.…”

“…High-density CMOS logic compatible One-Time Programmable (OTP) memories have been widely used in portable devices for code storage, parameter settings, redundancy implementation and circuit trimming. Different kinds of cell structure and program mechanism have been studied and reported, such as anti-fuse [1]- [5], fuse [6]- [8], and charge storage [9], [10] OTP. In a fuse cell, a high program current is required to create electron migration on poly-silicide or metal wires, which makes it hard to be scaled down.…”

A high density FinFET one-time programmable cell with new intra-fin cell isolation for advanced system on chip applications

“…Many different kinds of one-time programmable (OTP) structure and program mechanism have been studied and reported, 2) such as fuse, [3][4][5][6][7][8][9][10] anti-fuse, [11][12][13][14][15][16][17][18][19] and charge storage [20][21][22][23][24][25] memory. For the fuse structures, we need a power-consuming program current to create electron migration on metal or poly-silicide lines during data programming.…”