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Asphalt pavements have been extensively used in highway system. However, a great number of asphalt pavements suffer from early distresses after servicing for about 2–3 years, which leads to frequent rehabilitation and increased maintenance cost. To understand the damage propagation principle and the correlated rehabilitation measure, the progress of pavement distress rehabilitation, structural performance, and damage assessment of asphalt pavements has been explored in the perspectives of materials and structures. The current advance on the parameters for describing the cracking and rutting of asphalt pavements has been introduced. The development tendency for the damage self-healing and rehabilitation, and structural assessment has also been discussed. The study can provide a scientific guidance for understanding the generally used structural damage rehabilitation measure and performance assessment methods of asphalt pavements.

Various product applications bring up with increasing demands of logic NVM IP in advanced technology nodes. Encryption, security, functionality, and identification setting become indispensable in communication and high-end consumer electronics. A non-volatile memory cell, using anti-fuse programming mechanism to achieve high density and excellent data storage lifetime, is proposed. The unique cell design and operation scheme realize low programming-inhibit leakage current, fast program speed, and robust data retention. The memory macro is successfully demonstrated for one-time and multi-time programming applications with its full compatibility to sub-28nm and FinFET processes. IntroductionComparing with the use of commodity or stand-alone memory chips, products with embedded memory enhance the performance and reduce chip pin-counts, board space, and system cost. Embedded nonvolatile memory (NVM) has been widely used in consumer electronics, industrial and automotive applications for program code, firmware code, and data storage.Owing to the process simplicity of embedded logic process compatible NVM technology (logic-NVM), the technology and memory macro enable wider IP usages for: (1) identification or encryption data storage to achieve security or protection consideration, (2) storage of timing, parameter setting, function selection to achieve compact system design, and (3) the flexibility of field updates and product customization. Low/middle-end micro-controller unit (MCU) products have deployed logic-NVM for device ID, serial number setting, signal trimming and user parameter setting in a simpler and more cost-effective way. Now, logic-NVM is further adopted in key components of mobile device, such as CIS, DDI, PMU, AP, connectivity chip, etc., to minimize characteristic difference between chips by trimming and to calibrate system performance discrepancy by parameter setting. In addition, logic-NVM is also beneficial for security sensitivity applications, such as digital right protection and conditional access, which allow products to retain competitiveness. The IP usage of embedded NVM is illustrated in Figure 1.

No abstract

A remarkable 50% drive current enhancement for p-type metal–oxide–semiconductor field-effect-transistors (pMOSFETs) using a highly compressive SiN contact etch stop layer (CESL) has been successfully demonstrated. In this study, we also first proposed that applying a modulated buffer layer prior to the highly compressive CESL could significantly improving negative-bias-temperature-instability (NBTI) and time-dependent-dielectric-breakdown (TDDB) degradation of pMOSFETs using compressive CESL. Without adversely impact the significant drive current enhancement of pMOSFETs, this thin modulated buffer layer can improve the NBTI lifetime of core pMOSFETs by over two orders of magnitude. Instead of the complex and high-costly SiGe refill scheme, this highly compressive CESL layer with a thin modulated buffer layer successfully demonstrates a better candidate for pMOSFETs drive current enhancement of 45-nm-node CMOS and beyond.