2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) 2013
DOI: 10.1109/bctm.2013.6798179
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A high-speed cryogenic SiGe channel combiner IC for large photon-starved SNSPD arrays

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Cited by 14 publications
(10 citation statements)
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“…The comparator is a clocked design that has been described in detail previously. 8 To prevent a single pixel from blocking all other channels during its slow recovery phase, a clocked edgedetector circuit follows each comparator and provides a single clock cycle pulse each time a rising edge occurs. A schematic diagram of the edge detector appear in Fig.…”
Section: Design Of An Eight-input Channel Combinermentioning
confidence: 99%
See 2 more Smart Citations
“…The comparator is a clocked design that has been described in detail previously. 8 To prevent a single pixel from blocking all other channels during its slow recovery phase, a clocked edgedetector circuit follows each comparator and provides a single clock cycle pulse each time a rising edge occurs. A schematic diagram of the edge detector appear in Fig.…”
Section: Design Of An Eight-input Channel Combinermentioning
confidence: 99%
“…4(b) and further details regarding the sub-circuits are provided in. 8 After edge-detection, the outputs of each stream are combined into a single output using a binary tree of or-gates, with the final or-gate driving an open-collector stage that serves to drive an off-chip differential load. Careful attention was paid to the symmetry of both the clock distribution as well as the channel combining circuitry to ensure that all channels are phase matched and there is no glitching in the output signal.…”
Section: Design Of An Eight-input Channel Combinermentioning
confidence: 99%
See 1 more Smart Citation
“…Silicon-germanium heterojunction bipolar transistors (HBTs) are widely used in microwave applications such as radar and communication systems [1,2] and show potential in space science [3] and imaging applications, [4][5][6] owing to their competitive microwave performance combined with ease of integration with the CMOS process, high yield, and low cost relative to III-V technologies [7,8]. SiGe HBTs are now approaching the THz domain due to fabrication process advancements that enable the continued scaling of key parameters such as base width and resistance [2,9].…”
Section: Introductionmentioning
confidence: 99%
“…The interface and readout of such arrays using room temperature electronics are impractical due to heat load and SNR degradation caused by attenuation of the cables. Moreover, the stringent low noise temperature requirements for the readout could only be achieved by operating at cryogenic temperatures [5].…”
Section: Introductionmentioning
confidence: 99%