A highly efficient CMOS line driver with 80-dB linearity for ISDN U-interface applications

Kohorramabadi, H.; Anidjar, J.; Peterson, T.R.

doi:10.1109/4.173098

Cited by 15 publications

(3 citation statements)

References 14 publications

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“…We can find them in audio power amplifiers [1,2], integrated power amplifiers [3][4][5] (realized with two or more gain stages and a class-AB output stage [5][6][7]), integrated voltage regulators [8,9] and low-voltage high-gain operational transconductance amplifiers (OTAs) [6,7,10,11]. Frequency compensation of three-stage amplifiers in which the inner stage is the only noninverting one is traditionally accomplished through the nested Miller compensation (NMC) approach [12][13][14].…”

Section: Introductionmentioning

confidence: 99%

Analytical comparison of reversed nested Miller frequency compensation techniques

Grasso

Marano

Palumbo

et al. 2009

Circuit Theory & Apps

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In this paper, novel and previously proposed reversed nested Miller compensation (RNMC) networks are analyzed and compared, and their design equations are also presented. Hence, this paper is the natural extension of a previous paper by the authors (Int. J. Circ. Theor. Appl. 2008; 36(1):53-80), where only the nested Miller compensation topologies were treated.In particular, a coherent and comprehensive analytical comparison of the RNMC topologies, including two new networks presented for the first time, is performed by means of the figure of merit that expresses a trade-off among gain-bandwidth product, load capacitance and total transconductance, for equal values of phase margin (Int. J. Circ. Theor. Appl. 2008; 36(1):53-80).The analysis shows that there is no unique optimal solution among the RNMC topologies, as this depends on the load condition as well as on the relative transconductance magnitude of each amplifier stage. From this point of view, the proposed comparison also outlines useful design guidelines for the optimization of large-signal and small-signal performance. Simulations confirming the effectiveness of the proposed design methodology and analytical comparison are also included.

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Section: Introductionmentioning

confidence: 99%

Analytical comparison of reversed nested Miller frequency compensation techniques

Grasso

Marano

Palumbo

et al. 2009

Circuit Theory & Apps

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“…These circuit have the characteristic of being made-up of the parallel combination of a class AlB or even class A circuit and of a class Bone [7,8]. The class AlB circuit carries the entire output current in quiescent conditions.…”

Section: Push-pull Stagesmentioning

confidence: 99%

CMOS Buffer Amplifiers

Castello

1993

Analog Circuit Design

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This paper gives a tutorial presentation on the design of buffer amplifiers in CMOS technology. These are circuits that must drive a load made up of either a large capacitor or a small resistor or both. The core of the paper deals with special purpose buffer amplifiers intended for a specific application most often within a mixed analOg/digital system integrated on a single chip. Several architectures for both input class NB and output push-pull stages are discussed and compared. Issues like quiescent current control, frequency compensation, open loop and closed loop linearity are analysed in detail with the help of many examples.

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“…We can find them in audio power amplifiers [1,2], in integrated power amplifiers [3][4][5] (realized with two or more gain stages and a class AB output stage [5][6][7][8]), in integrated voltage regulators [9,10], and recently also to implement low-voltage high-gain operational transconductance amplifiers (OTAs).…”

Section: Introductionmentioning

confidence: 99%

Analytical comparison of frequency compensation techniques in three‐stage amplifiers

Grasso

Palumbo

Pennisi

2006

Circuit Theory & Apps

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SUMMARYIn this paper, design equations of the most common Nested Miller topologies are derived. Moreover, a coherent and comprehensive analytical comparison among the different topologies is also presented. In particular, after deriving design equations, following the approach previously proposed by the authors that have the phase margin as the main design parameter, the different solutions are compared by evaluating a novel figure of merit that expresses a trade-off between gain-bandwidth product, load capacitance and total transconductance, for equal values of phase margin. It is shown that there is no unique optimal solution as this depends on the load condition and the relative magnitude of the transconductance of each stage. From this point of view, the proposed comparison also provides useful design guidelines for the optimization of small-signal performance. Simulations confirming the effectiveness of the comparison are also given.

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A highly efficient CMOS line driver with 80-dB linearity for ISDN U-interface applications

Cited by 15 publications

References 14 publications

Analytical comparison of reversed nested Miller frequency compensation techniques

Analytical comparison of reversed nested Miller frequency compensation techniques

CMOS Buffer Amplifiers

Analytical comparison of frequency compensation techniques in three‐stage amplifiers

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