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A base-band modendcodec chip for the dual-mode North Amencan IS-54 standard is shown in the block diagram of Figure 1 [I]. In the digital mode ofoperation, this chip acts a s a modem.On the transmit side it performs d4-shifted DQPSK modulation, square-root raised-cosine filtering, and waveform synthesis. The receive section helps to demodulate the signal by minimizing the intersymbol interference using square-root raised-cosine filters. In the analog mode of operation, the chip behaves like a codec. The transmit section supports part ofthe frequency modulation process while the receive section acts a s an analog-to-digital interface. In addition to integrating the signal-processing sections of the transmit and receive paths, the chip also offers auxiliary controls for such functions as automatic gain control, automatic frequency control, and transmit power control. A wide-band data detector is provided to decode the Manchester-encoded forward analog control channel (FOCC) messages in stand-by mode or forward analog voice channel (FVC) messages.In the digital mode, the front end of the transmit section is a d 4 shifted DQPSKmodulator. It generates the I and Q signals in response to the I b transmit data stream [l]. The I and Q channel vector components can have one of five values -0,1, YZm, -1/2L"L, or -1 -t h a t produce the constellation shown in Figure 2. The I and Q impulses are then applied to the baseband filters, which have a square-root raised-cosine frequency response with a roll-off factor of 0.35. These are followed by linear interpolators and sinc filters to increase the sampling rate ofthe following D/Aconverter and also to suppress images produced by t h e square-root raised-cosine filter. The oversampled data is then applied to an 8b current-steering D/A converter [21. This is followed by a third-order Bessel reconstruct filter. The above-mentioned interpolation process helps to realize this filter using on-chip resistors and capacitors that can have a wide tolerance.Error vector is an important system requirement. It is defined as the difference between the ideal position ofthe signal in the constellation and the actual received one, averaged over all positions. Gain mismatch between the I and Q channels, intersymbol interference due to imperfect raised-cosine filtering, integral non-linearity of the D/A converters, and dc offset contribute to the error vector.Differential offset would also result in carrier frequency leakage into the transmitted signal. The offset correction circuitry works in the analog domain and corrects for any offset in the transmit path. The offset value, storedjust before the transmit time slot, is used for offset cancellation during the transmission interval. The measured offset with the correction turned on, is less than 0.15mV. Its contribution to the error vector is negligible, and the carrier leakage caused by it is nearly 85dB below the signal at the antenna output.The IS-54 standard also calls for strict control on spurious emissions when the transmitter IS turned on...

Architectural and circuit innovations resulting in a 260mW single-chip ISDN U-interface transceiver wii h a range of more than 21Kft of AWG26 cable are described. These include a new scheme for jitter compensation using a two-phase decimator that results in faster phase adjustment and jitter tracking, and a fastconverging nonlinear echo canceler that can track time-dependent components of nonlinear distortion.