A Highly-Guided X-Filling Method for Effective Low-Capture-Power Scan Test Generation

Abstract

X-filling is preferred for low-capture-power scan test generation, since it reduces IR-drop-induced yield loss without the need of any circuit modification. However, the effectiveness of previous X-filling methods suffers from lack of guidance in selecting targets and values for X-filling. This paper addresses this problem with a highly-guided X-filling method based on two novel concepts: (1) X-score for X-filling target selection and (2) probabilistic weighted capture transition count for X-filling value selection. Experimental results show the superiority of the new X-filling method for capture power reduction.

iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing

“…However, they either target only one type of power consumption (shift-power reduction [15] or capture-power reduction [16][17][18]) or do not consider the difference of the two types of power consumptions [19]. In this paper, we investigate the impact of X-bits and propose a novel X-filling technique to reduce both shift-and capture-power during at-speed scan tests, namely iFill.…”

“…Typically, test stimuli and responses are shifted in and out concurrently, therefore the power consumptions during shift-in and shift-out processes need to be both considered. Capture-power can be estimated by the capture transition count, defined as the total number of transitions in logic gates and scan flip-flops (SFFs) in capture cycle [18].…”

A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line

“…Since we don't have any real faulty circuits, faulty responses were created virtually by the fault simulation which is same as that used in the proposed diagnosis method. Similar experimental setups have been also used by other researches [6]- [9]. We must point out that our proposed method guarantees that a fault existing in a CUD is always included in the candidate fault list obtained by the proposed method.…”

Reseeding-Oriented Test Power Reduction for Linear-Decompression-Based Test Compression Architectures

“…At present, X-filling is the main way to reduce capture power, such as X-filling based on probabilistically-estimation [12], preferred-fill based on probability [23], JP-fill based on adjustment [24] etc. Xfilling can also be used to reduce shift power, such as 0-filling, 1-filling, minimum transition filling [25] and adjacent filling [26] etc.…”

“…Plenty of schemes have been proposed to reduce test power, such as low-power test scheduling [3], [4], test-pattern ordering [5], low-power test data compression [6], [7], scan chain structural conversion [8], low-power automatic test pattern generation (ATPG) algorithm [9], [10] and low-power Xfilling [11], [12] and so on. These schemes can reduce test power effectively, nevertheless some of them may result in poor test quality and the increase in test data.…”