A Highly Scalable Interface Fuse for Advanced CMOS Logic Technologies

Self Cite

A full logic-compatible embedded gate contact resistive random access memory (GC-RRAM) cell in the CMOS FinFET logic process without extra mask or processing steps has been successfully demonstrated for high-density and low-cost logic nonvolatile memory (NVM) applications. This novel GC-RRAM cell is composed of a transition metal oxide from the gate contact plug and interlayer dielectric (ILD) in the middle, and a gate contact and an n-type epitaxial drain terminal as the top and bottom electrodes, respectively. It features low-voltage operation and reset current, compact cell size, and a stable read window. As a promising embedded NVM solution, the compact one transistor and one resistor (1T1R) cell is highly scalable as the technology node progresses. Excellent data retention and cycling capability have also been demonstrated by the reliability testing results. These superior characteristics make GC-RRAM one of a few viable candidates for logic NVM for future FinFET circuits.

Section: Introductionmentioning

confidence: 99%

Gate contact resistive random access memory in nano scaled FinFET logic technologies

Hsu

Shih

Chih

et al. 2017

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“…Many different kinds of one-time programmable (OTP) structure and program mechanism have been studied and reported, 2) such as fuse, [3][4][5][6][7][8][9][10] anti-fuse, [11][12][13][14][15][16][17][18][19] and charge storage [20][21][22][23][24][25] memory. For the fuse structures, we need a power-consuming program current to create electron migration on metal or poly-silicide lines during data programming.…”

Section: Introductionmentioning

confidence: 99%

A high density FinFET one-time programmable cell with new intra-fin cell isolation for advanced system on chip applications

Chen¹,

Yuan²,

Peng³

et al. 2016

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A fully CMOS compatible one-time programmable (OTP) cell with a novel intra-fin cell isolation (IFCI) structure on a FinFET CMOS process has been proposed. The IFCI OTP cell utilizes the field-enhanced dielectric breakdown at fin corners to perform a fast and low-voltage program operation. Moreover, an ultrasmall intra-fin cell-to-cell isolation is firstly introduced to markedly shrink the cell size by eliminating the area-consuming spacing of fin-to-fin isolation. The IFCI FinFET OTP with fast program speed, excellent read disturb immunity, and reliable data retention is a promising solution for logic nonvolatile memory (NVM) technology in advanced CMOS nodes.

“…Integrating logic CMOS and NVM within same chip, embedded NVM is very important for long term storage of essential system information and data, especially in portable device. Considering code, secure storage or customized settings, one-time programmable (OTP) memories including anti-fuse, [1][2][3][4][5][6][7][8][9] fuse, [10][11][12][13][14][15][16][17] charge trapping [18][19][20][21][22] memory, and mask read only memory (ROM) 23,24) have been reported. Nowadays, due to growing demand of portable devices, we prefer using the one with better flexibility and less power consumption.…”

Section: Introductionmentioning

confidence: 99%

A new 28 nm high-k metal gate CMOS logic one-time programmable memory cell

Hsiao¹,

Mei²,

Shen³

et al. 2014

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This work presents a high density high-k metal gate (HKMG) one-time programmable (OTP) cell. Without additional processes and steps, this OTP cell is fully compatible to 28 nm HKMG CMOS process. The OTP cell adopts high-k dielectric breakdown as programming mechanism to obtain more than 105 times of on/off read window. Moreover, it features low power and fast program speed by 4.5 V program voltage in 100 µs. In addition to the ultrasmall cell area of 0.0425 µm2, the superior performance of disturb immunities and data retention further support the new logic OTP cell to be a very promising solution in advanced logic non-volatile memory (NVM) applications.