A Knowledge-Based System for Designing Testable VLSI Chips

Scan Insertion on Multi Clock Design in Modern SOC's

“…Storage elements on the data path portion cannot afford too much delay increase, especially when replaced with muxed-D scan cells, they are left out of the scan cell replacement process [9]. On the other hand, storage elements in the control portion may be replaced with scan cells.…”

SPARTAN: a spectral and information theoretic approach to partial-scan

“…Abadir and Breuer created the I-path to analyze an RTL circuit description to introduce DFT structures [28]. An I-path is a data channel over which test data flows.…”

On the identification of modular test requirements for low cost hierarchical test path construction

“…Transparency has been defined as surjective functions for justifying test vectors and injective functions for propagating test responses. Surjective and injective functions are referred to in the literature as S-Paths and FPaths respectively [10], while bijective functions, satisfying both properties, are referred to as I-Paths and T-Paths [11]. Several variations of surjective, injective, and bijective functions, including Ambiguity Sets [1], Transparency Modes [2], and Transparency Properties [9], have also been used in order to improve efficiency and reduce cost.…”

“…Along the first direction, several research efforts [1,2,[9][10][11] have been invested in defining, extracting, and utilizing inherent design transparency. Along the second direction [4], inherent functionality of the surrounding logic is used to constrain local test generation, rendering translatable test.…”