A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface

Hayashi, Akira; Tokusashi, Yuta; Matsutani, Hiroki

doi:10.1145/2927964.2927969

Cited by 9 publications

(6 citation statements)

References 4 publications

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“…This is possible due to the high I/O performance flexibility afforded in modern FPGA architectures and is a model that cannot be considered for accelerators like GPUs that rely on a host CPU for management. This approach has seen use in a variety of scenarios [25], [26], [27], and has been demonstrated to lead to reductions in latency for specific applications compared to PCIe or purely software solutions. There has not been a characterisation of the detailed latency components introduced by this approach however, and there has not been an investigation into the effects of virtualising these devices.…”

Section: Background and Related Workmentioning

confidence: 99%

Characterizing Latency Overheads in the Deployment of FPGA Accelerators

Cooke

Fahmy

2020

2020 30th International Conference on Field-Programmable Logic and Applications (FPL)

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Section: Background and Related Workmentioning

confidence: 99%

Characterizing Latency Overheads in the Deployment of FPGA Accelerators

Cooke

Fahmy

2020

2020 30th International Conference on Field-Programmable Logic and Applications (FPL)

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“…There are some prior works that present FPGA-based outlier detection that detects anomaly values (not changepoints). In a paper [12], for example, an outlier detection based on Mahalanobis distance is implemented in an FPGA NIC. As a more practical outlier detection algorithm, in a paper [13], LOF (Local Outlier Factor) algorithm is accelerated by using an FPGA.…”

Section: Related Workmentioning

confidence: 99%

An FPGA-Based Change-Point Detection for 10Gbps Packet Stream

Iwata

Nakamura

Tokusashi

et al. 2019

IEICE Trans. Inf. & Syst.

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In statistical analysis and data mining, change-point detection that identifies the change-points which are times when the probability distribution of time series changes has been used for various purposes, such as anomaly detections on network traffic and transaction data. However, computation cost of a conventional AR (Auto-Regression) model based approach is too high and infeasible for online. In this paper, an AR model based online change-point detection algorithm, called Change-Finder, is implemented on an FPGA (Field Programmable Gate Array) based NIC (Network Interface Card). The proposed system computes the change-point score from time series data received from 10GbE (10Gbit Ethernet). More specifically, it computes the change-point score at the 10GbE NIC in advance of host applications. It can find change-points on single or multiple streams using a context memory. This paper aims to reduce the host workload and improve change-point detection performance by offloading ChangeFinder algorithm from host to the NIC. As evaluations, change-point detection in the FPGA NIC is compared with a baseline software implementation and those enhanced by two network optimization techniques using DPDK and Netfilter in terms of throughput. The result demonstrates 16.8x improvement in change-point detection throughput compared to the baseline software implementation. It is corresponding to the 10GbE line rate. Performance and area overheads when supporting multiple streams are also evaluated. key words: Change-point detection, FPGA NIC, 10GbE * This paper is an extended version of our workshop paper [5], by supporting change-point detections on multiple streams.

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“…PCA is short for principal component analysis [4]. Its basic principle is to transform the original component-related random vector into a component-unrelated random vector by means of orthogonal transformation, and then perform dimensionality reduction on the transformed multi-dimensional variable system.…”

Section: Principal Component Analysismentioning

confidence: 99%

Detection of Network Intrusion Threat Based on the Probabilistic Neural Network Model

Wang

Gu²

2019

ITC

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With the popularity of the Internet, people's lives are becoming more and more convenient. However, the network security problems are becoming increasingly serious. This paper, aiming to better protect users’ network security from the internal and external malicious attacks, briefly introduces the probabilistic neural network and principal component analysis method, and combines them for detection of network intrusion data. Simulation analysis of Probabilistic Neural Network (PNN) and Principal Component Analysis-Probabilistic Neural Network (PCA-PNN) are carried out in MATLAB software. The results suggest that the Principal Component Analysis (PCA) algorithm greatly reduce the dimension of the original data and the amount of calculation. Compared with PNN, PCA-PNN has higher accuracy and precision rate, lower false alarm rate, and faster detecting speed. Moreover, PCA-PNN has better detecting performance when there are few training samples. In summary, PCA-PNN can be used for the detection of network intrusion threat.

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A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface

Cited by 9 publications

References 4 publications

Characterizing Latency Overheads in the Deployment of FPGA Accelerators

Characterizing Latency Overheads in the Deployment of FPGA Accelerators

An FPGA-Based Change-Point Detection for 10Gbps Packet Stream

Detection of Network Intrusion Threat Based on the Probabilistic Neural Network Model

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