A linear-in-dB radio-frequency power detector

Wu, Janne-Wha; Hsu, Kai‐Cheng; Lai, Wen‐Hsiang; To, Chih-Ho; Chen, Sheng-Wen; Tang, Ching‐Wen; Juang, Ying‐Zong

doi:10.1109/mwsym.2011.5972772

Cited by 13 publications

(4 citation statements)

References 7 publications

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“…Various configurations have been studied to expand the bandwidth of limiting amplifiers, such as inductive peaking technology [18], capacitive degeneration technique [19], Cherry-Hopper topology [20], active negative feedback architecture [21], PMOS diode-connected load [22] etc. Compared to MOSFETs, SiGe HBTs usually provide larger transconductance.…”

Section: Limiting Amplifiermentioning

confidence: 99%

A 55-dB dynamic range wideband RF logarithmic power detector with temperature and DC offset compensation

Jiang

Zhang

et al. 2021

IEICE Electron. Express

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A wideband RF logarithmic power detector with large dynamic range is presented in this work. The power detector fabricated in 180-nm SiGe process employs the successive approximation technique over a 6stage cascaded amplifier chain. A cross-coupled cascode amplifier architecture is proposed to expand bandwidth up to 8GHz. With a temperature compensation circuit and a DC offset compensation loop, the detector provides consistent logarithmic performance at different temperatures in band, which can be applied in highly reliable RF systems. The measured input dynamic range is larger than 50dB in 1MHz~8GHz with less than ±1dB error and 55dB at 8GHz with less than ±3dB error. The measured temperature drift is less than ±1.0dB at 5GHz over the temperature range from -40 to 85℃.

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Section: Limiting Amplifiermentioning

confidence: 99%

A 55-dB dynamic range wideband RF logarithmic power detector with temperature and DC offset compensation

Jiang

Zhang

et al. 2021

IEICE Electron. Express

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“…5 c where the squarer core is based on two identical unbalanced source‐coupled pairs (M3‐M4 and M5‐M6) connected in parallel. This circuit was proposed in [18] and used for rectifiers in logarithmic amplifiers also in [19, 20] but the rectified current was converted to a voltage using a simple resistor which is not the best way in terms of PVT variations. While following the proposed PVT cancellation concept, a replica of the squarer core is used in a diode connected configuration as shown in Fig.…”

Section: Proposed Detector Designmentioning

confidence: 99%

Design of a ±0.15 dB accurate baseband detector for FMCW radars employing inherent PVT cancellation

El-Shennawy

Joram

Ellinger

2017

IET Circuits, Devices & Systems

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This study presents design methodologies for high accuracy baseband detectors for use in automatic gain control (AGC) loops. These loops are used in many applications to stabilise the signal level in a transceiver chain. In a wireless frequency modulated continuous wave (FMCW) radar receiver for example, it is desired to maintain a constant baseband signal level at the receiver output prior to the analogue-to-digital converter. Due to the AGC loop feedback action, the accuracy of this output level directly depends on the detector accuracy. In this study, a detector design employing inherent cancellation of process, voltage and temperature (PVT) variations without the need for any complex compensation schemes is proposed. Measurement results of a fabricated test chip are in good agreement with simulations achieving ±0.15 dB accuracy over temperature, supply and part-to-part variations. The fabricated detector prototype on an IBM 0.18 µm technology has an active area of 0.05 mm 2 anddraws1mAfroma3Vsupply. An integrated AGC loop including the proposed detector achieves a 52 dB dynamic range consuming an overall 9 mW power. To the best of the authors' knowledge, the proposed detector has the highest uncalibrated accuracy reported up to date.

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“…When power detection is required, it is calculated from the measured amplitude. A detector linear-in-dB (or logarithmic) characteristic, as it is often desired, can be obtained from a MOSFET rectifier by using a logarithmic amplifier [10]- [12] or by a piecewise approximation [13]- [15]. Both approaches require large circuit area and supply power, which makes integration of the detectors to SoCs for BiST/BiSC difficult.…”

Section: Introductionmentioning

confidence: 99%

“…The need for high gain introduces a tradeoff between bandwidth and dynamic range for the detector due to the gain-bandwidth tradeoff in the gain stages. In recent studies [13]- [15], the linear-in-dB dynamic range contributed per detector cell spans from 8 to 14 dB. Developing detector cells with a larger linear-in-dB dynamic range would minimize the number of required gain stages or eliminate them entirely.…”

Section: Introductionmentioning

confidence: 99%

Digitally Assisted CMOS RF Detectors With Self-Calibration for Variability Compensation

Barabino

Silveira

2015

IEEE Trans. Microwave Theory Techn.

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In this paper, a technique of digitally assisted RF detectors with variability compensation is proposed. It enables the ability to obtain a high dynamic-range linear-in-dB characteristic with a small footprint. Digital assistance is used to correct for a nonlinear characteristic and to perform a self-calibration. In state-of-the-art CMOS RF systems-on-chip (SoCs), the digital capabilities required for this technique would not represent an overhead for the design, as they are already available. The self-calibration compensates for the process variability relying on internal dc measurements and statistical information derived from the statistical models provided by the foundry. This technique would benefit SoCs, which implement built-in self test or built-in self calibration by enabling multiple high dynamic-range internal RF measurements, while complying with tight area and power budgets. A proof-of-concept detector cell is presented in a 90-nm CMOS process, which provides a maximum linearity error of 1.5 dB and a 33-dB dynamic range at 2 GHz after digital correction. The circuit occupies an area of 0.004 mm and consumes a maximum of 240-A from a 1.2-V supply. The results are confirmed by measurements performed on ten samples. Index Terms-Built-in-self-calibration (BiSC), built-in-self-test (BiST), deep-submicrometer CMOS, digitally assisted, linearin-dB detector, millimeter wave (mmW), RF, system-on-chip (SoC), variability compensation.

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A linear-in-dB radio-frequency power detector

Cited by 13 publications

References 7 publications

A 55-dB dynamic range wideband RF logarithmic power detector with temperature and DC offset compensation

A 55-dB dynamic range wideband RF logarithmic power detector with temperature and DC offset compensation

Design of a ±0.15 dB accurate baseband detector for FMCW radars employing inherent PVT cancellation

Digitally Assisted CMOS RF Detectors With Self-Calibration for Variability Compensation

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