2016
DOI: 10.1109/ted.2015.2475355
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A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

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Cited by 66 publications
(41 citation statements)
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“…A maximum PDP of 10.5% (pixel A) and 26.7% (pixel B) is reached at 520nm at the same excess bias of 3.3V, while the PDP nonuniformity is better than 1.4% (pixel A) and 3.2% (pixel B) at RT. Lower PDP compared to the previous work based on p-i-n SPAD [25] is caused by the border effect [27]. The border effect is more significant when the active diameter is smaller than 5µm, while the drawn active diameters for pixel A and B are 2.8µm and 3.88 µm, respectively.…”
Section: Resultsmentioning
confidence: 62%
“…A maximum PDP of 10.5% (pixel A) and 26.7% (pixel B) is reached at 520nm at the same excess bias of 3.3V, while the PDP nonuniformity is better than 1.4% (pixel A) and 3.2% (pixel B) at RT. Lower PDP compared to the previous work based on p-i-n SPAD [25] is caused by the border effect [27]. The border effect is more significant when the active diameter is smaller than 5µm, while the drawn active diameters for pixel A and B are 2.8µm and 3.88 µm, respectively.…”
Section: Resultsmentioning
confidence: 62%
“…2(a). When compared to the previous implementation, the timing jitter increased from 100.8 ps [22] to the current 123 ps. A cascode transistor in series increases the output resistance and could increase the timing jitter due to a slower rising edge.…”
Section: Cmos High-performance Spad Arraymentioning
confidence: 76%
“…The SPAD sensor is based on a previous low noise SPAD design [22], implemented in a 180 nm CMOS technology. The impinging photon flux i translates into efficiency PD is equal to n cascode trans bias V EX , ove both the quen SPAD fires, t Figure 3 shows PDP measurements, with the peak PDP increased by 10% compared to the previous design [22]. The PDP measurement setup is illustrated in Fig.…”
Section: Cmos High-performance Spad Arraymentioning
confidence: 99%
“…They also proposed a new SPAD device in 2016, which uses a vertical PIN structure. It can achieve a dark counting rate of 1.5cps/μm² under an excess bias of 11 V, and the PDP reaches 40% in the range of 460 nm∼600 nm [8]. References [7], [8] designed high-performance SPAD devices based on buried structures.…”
Section: Introductionmentioning
confidence: 99%