A Low-IF/Zero-IF Reconfigurable Analog Baseband IC With an I/Q Imbalance Cancellation Scheme

Kitsunezuka, Masaki; Tokairin, Takashi; Maeda, Tadashi; Fukaishi, M.

doi:10.1109/jssc.2010.2102510

Cited by 28 publications

(8 citation statements)

References 12 publications

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“…The measured centre frequency is 3 MHz, and the bandwidth is 2 MHz, and the measured IRR is 32 dB at the centre frequency. The proposed complex filter gives the lowest power consumption of 460 μW compared with the state-of-the-art filters [4][5][6] shown in Table 1.…”

Section: Vb_p2mentioning

confidence: 99%

460 μW 32 dB image rejection ratio second‐order active‐RC complex filter with improved power efficient opamp

Wang

Chen

et al. 2013

Electron. lett.

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An ultra-low-power second-order Chebyshev active-RC complex filter for a low-IF ultra-low-power receiver is presented. By utilising a polecancellation push-pull buffer with feedforward phase compensation technology, the operational amplifier (opamp) realises superior stability while maintaining high gain bandwidth and ultra-low power consumption. A second-order complex filter with four proposed opamps and an adaptive bias fabricated in standard 180 nm CMOS process consumes only 460 μW at 1.8 V power supply. The measured centre frequency is 3 MHz and bandwidth is 2 MHz, while it achieves 32 dB image rejection ratio at the centre frequency.

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Section: Vb_p2mentioning

confidence: 99%

460 μW 32 dB image rejection ratio second‐order active‐RC complex filter with improved power efficient opamp

Wang

Chen

et al. 2013

Electron. lett.

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“…In addition, design of lower-order filters is less complex. In the literature, the order of an analog filter at baseband ranges from 3 rd to 8 th order, with most using 4 th /5 th order to best trade-off circuit complexity and performance [1]- [3], [6]- [8], [21]- [24].…”

Section: A Selection Of Filter Ordermentioning

confidence: 99%

“…where the fixed capacitance values are based on the 5 th -order LPF, which have been calculated in (6).…”

Section: F Design Of a 5 Th -/7 Th -Order Lpfmentioning

confidence: 99%

“…The design of dynamically reconfigurable analog, and mixed-signal circuits and systems is important yet challenging. Recently, there has been tremendous demand for reconfigurable ABB design, since it can be used for many applications, ranging from a cellular network, such as a software-defined radio [1]- [4], [6], to a recent automotive radar system [5]. All of these designs are targeted for data-constraint applications, where achieving high-speed data transfer is the primary requirement.…”

Section: Introductionmentioning

confidence: 99%

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Design of Reconfigurable dB-Linear Variable-Gain Amplifier and Switchable-Order $g_{m}$ -C Filter in 65-nm CMOS Technology

Liu

Zhu

et al. 2019

IEEE Trans. Microwave Theory Techn.

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A system approach for a power-scalable analog baseband (ABB) design is presented in this paper. Using this approach, the energy efficiency of an ABB can be maximized without compromising any other important specifications. To fulfill the feasibility study, a switchable-order gm-C lowpass filter (LPF) along with a voltage-controlled programmable-gain amplifier (VC-PGA) are designed. The selectivity of the LPF can be linearly scaled with power consumption. In addition, the power consumption of the VC-PGA has a binary-weighted manner. In contrast to conventional PGAs, the gain step of the designed PGA can be continuously tuned by a control voltage. To prove the concept, the ABB is implemented in 65 nm CMOS technology. The measurements show that the frequency responses of the ABB can be configured as either 5 th or 7 th order with 16 gain steps. The bandwidth is approximately 50 MHz for all cases and the gain step can be continuously tuned between 0 and 3 dB. At the high-gain mode, the output 3 rd-order intercept point (OIP3) and the input-referred noise (IRN) of the LPF and PGA are approximately to be 8 dBm and 5 nV/sqrt Hz, respectively. The maximum power consumption of the ABB, excluding the output buffer, is approximately 19.8 mW with a 1.2 V supply voltage. The die area, excluding the pads, is only 0.18 mm 2 .

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“…Methods for solving image problems by compensating I/Q mismatch are presented in References [ 2 , 3 , 4 , 5 , 6 ]. During the I/Q mismatch calibration phase, the Injection-Locked Frequency Multiplier (ILFM) block generates the same frequency as the RF signal before receiving the RF signal through the antenna, as shown Figure 1 .…”

Section: Introductionmentioning

confidence: 99%

A Design of Small Area, 0.95 mW, 612–1152 MHz Open Loop Injection-Locked Frequency Multiplier for IoT Sensor Applications

Kim

et al. 2018

Sensors

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This paper presents a 612–1152 MHz Injection-Locked Frequency Multiplier (ILFM). The proposed ILFM is used to send an input signal to a receiver in only the I/Q mismatch calibration mode. Adopting a Phase-Locked Loop (PLL) to calibrate the receiver places a burden on this system because of the additional area and power consumption that is required. Instead of the PLL, to satisfy high-frequency, low-jitter and low-area requirements, a Ring Oscillator is adopted in the system. The free-running frequency of the ILFM is automatically and digitally calibrated to reflect the frequency of the injected signal from the harmonics of the reference clock. To control the frequency of the ILFM, the load current is digitally tuned with a 6-bit digital control signal. The proposed ILFM locks to the target frequency using a digitally controlled Frequency Locked Loop (FLL). This chip is fabricated using 1-poly 6-metal 0.18 µm CMOS and has achieved the wide tuning range of 612–1152 MHz. The power consumption is 0.95 mW from a supply voltage of 1.8 V. The measured phase noise of the ILFM is −108 dBc/Hz at a 1 MHz offset.

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A Low-IF/Zero-IF Reconfigurable Analog Baseband IC With an I/Q Imbalance Cancellation Scheme

Cited by 28 publications

References 12 publications

460 μW 32 dB image rejection ratio second‐order active‐RC complex filter with improved power efficient opamp

460 μW 32 dB image rejection ratio second‐order active‐RC complex filter with improved power efficient opamp

Design of Reconfigurable dB-Linear Variable-Gain Amplifier and Switchable-Order $g_{m}$ -C Filter in 65-nm CMOS Technology

A Design of Small Area, 0.95 mW, 612–1152 MHz Open Loop Injection-Locked Frequency Multiplier for IoT Sensor Applications

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