A low noise integrated AMPS IF filter

SUMMARYWe propose a concept of evolvable analog LSIs and apply it to Intermediate Frequency (IF) filters, which are widely used in cellular phones. The developed chip can correct discrepancies in the values of analog circuit components by genetic algorithms (GAs), which have attained (1) a yield rate of 97%, (2) a 60% reduction of the filter area, and (3) a 38% reduction of power dissipation, compared with AKM commercial products. When analog Integrated Circuits (ICs) and Large-Scale Integrated Circuits (LSIs) are manufactured, the values of the analog circuit components, such as resistors or capacitors, often vary from the precise design specifications. Analog LSIs with such defective components cannot perform at required levels and thus have to be discarded. However, our technique can improve yield rates of analog LSIs and has two additional advantages, namely, smaller circuits and less power dissipation, which can lead to cost reductions and efficient implementation of analog LSIs. This approach could be applied to a wide variety of analog LSIs. © 2001 Scripta Technica, Electr Eng Jpn, 138(3): 6371, 2002

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“…(6) Find i which maximizes the stored fitness. (7) Invert C(max) determined in step (6) and go back to step (2).…”

Section: Resultsmentioning

confidence: 99%

“…The IF filter which we have adopted is an 18th-order filter [7]. The architecture for the filter is depicted in Fig.…”

Section: Filter Architecturementioning

confidence: 99%

Evolvable analog LSIs: Adaptation to process variations via genetic algorithms

Murakawa

Kasai

Adachi

et al. 2002

Electrical Engineering Japan

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“…Such discrepancies cause serious problems for high-end analog circuit applications. For example, in intermediate frequency (IF) filters [24], which are widely used in cellular phones, even a 1% discrepancy from the center frequency is unacceptable. It is therefore necessary to carefully examine the analog circuit and to discard those which do not meet the specifications.…”

Section: A Overviewmentioning

confidence: 99%

Real-world applications of analog and digital evolvable hardware

Higuchi¹,

Iwata²,

Keymeulen³

et al. 1999

IEEE Trans. Evol. Computat.

160

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In contrast to conventional hardware where the structure is irreversibly fixed in the design process, evolvable hardware (EHW) is designed to adapt to changes in task requirements or changes in the environment, through its ability to reconfigure its own hardware structure dynamically and autonomously. This capacity for adaptation, achieved by employing efficient search algorithms based on the metaphor of evolution, has great potential for the development of innovative industrial applications. This paper introduces EHW chips and six applications currently being developed as part of MITI's Real-World Computing Project; an analog EHW chip for cellular phones, a clock-timing architecture for Giga hertz systems, a neural network EHW chip capable of autonomous reconfiguration, a data compression EHW chip for electrophotographic printers, and a gate-level EHW chip for use in prosthetic hands and robot navigation.

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“…Intermediate Frequency (IF) filters find a wide variety of applications in modern communication systems, from superheterodyne AM and FM radio receivers to AMPS [1] cellular telephone receivers. These filters are required to satisfy stringent frequency-selective bandpass frequency response characteristics around the respective IF frequencies.…”

Section: Introductionmentioning

confidence: 99%

A novel technique for the design and DCGA optimization of bilinear-LDI lattice-based digital IF filters

Nowrouzian

2008

2008 IEEE International Symposium on Circuits and Systems (ISCAS)

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Intermediate Frequency (IF) filters find diverse practical applications in modern communication systems. This paper presents a novel technique for the design and optimization of digital IF filters. This technique consists of two separate stages. In the first stage, the bilinear-LDI lattice digital filter realization approach is exploited and applied to the design of an infiniteprecision digital IF filter responsible for satisfying the given design specifications only approximately. In the second stage, a diversity-controlled (DC) genetic algorithm (GA) is applied to the finite-precision optimization of the resulting IF digital filter so as to satisfy all the design specifications exactly. The DCGA optimization employs an existing cross-generational probabilistic survival selection scheme for increasing the convergence speed. The application of the proposed technique to the optimization of an eighteenth-order AMPS digital IF filter operating around a center frequency of 455 kHz only required 500 generations to converge.

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A low noise integrated AMPS IF filter

Cited by 19 publications

References 3 publications

Evolvable analog LSIs: Adaptation to process variations via genetic algorithms

Evolvable analog LSIs: Adaptation to process variations via genetic algorithms

Real-world applications of analog and digital evolvable hardware

A novel technique for the design and DCGA optimization of bilinear-LDI lattice-based digital IF filters

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