A Low-Power 26-GHz Transformer-Based Regulated Cascode SiGe BiCMOS Transimpedance Amplifier

High Performance Design Techniques of Transimpedance Amplifier

“…An inductor can be interposed between a photodiode and the input of a transimpedance amplifier so as to increase the bandwidth [2]. …”

“…CMOS process technology gives low power, low cost and high yield which offers the most economical solution in the consumer application market [3]. Transimpedance amplifier typically determines the overall optical link performance, as their speed and sensitivity set the maximum data rate and tolerable channel loss [2]. The design of wide band TIA is the challenging mainly because it is driven by a photo detector with high capacitance usually ranging from 0.2 to 0.5 pF [4].…”

“…To capture sufficient optical power, large area photodiode is evitable, bringing large junction capacitance. Various CMOS TIA architectures have been reported that essentially explore different input stages for isolating the large input capacitance of the photodiode from bandwidth determination, such as common gate (CG) input stage [2], regular cascade (RGC) stage [2], [9], or CG feed forward topology containing negative feedback [2]. Other bandwidth enhancement techniques, such as inductive peaking [3] and capacitive degeneration [9], are also implemented.…”

A single-to-differential broadband transimpedance amplifier for 12.5 Gb/s optical links

“…Moreover, in order to eliminate common-mode noises from power supply and substrate, the TIA usually provide differential signal for limiting amplifier (LA). Unfortunately, considering the cost, usually only one photodetector (PD) is designed to provide a single-ended input signal [2,3,4]. Therefore, there are two prominent challenges in high-performance TIA design that stem from the potentially large PD junction capacitance, which deteriorates both the system bandwidth and noise performance, and achieving differential configuration.…”

Wideband SiGe BiCMOS transimpedance amplifier for 20 Gb/s optical links

“…The front-end transimpedance amplifier (TIA) is the critical block in the OEIC, affecting the whole system, as its speed and sensitivity set the maximum data rate and the tolerable channel loss [2]. One prominent challenge in TIA design stems from the potentially large photodiode parasitic capacitance, which deteriorates both the system bandwidth and its noise performance [3,4]. Therefore, various circuit techniques have been demonstrated to relax bandwidth limitations, including the regulated cascode (RGC) configuration [5], capacitive degeneration techniques [6,7], and wideband matching networks using series inductive peaking and shunt inductive peaking techniques [8].…”