A low-power CMOS 155 Mb/s transceiver for SONET/SDH over co-ax and fibre

Altmann, M.; Caia, J.M.; Morle, R.; Dunsmore, M.R.B.; Xie, Youbai; Kocaman, Namik

doi:10.1109/cicc.2001.929739

Cited by 2 publications

(1 citation statement)

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“…The typical equalizer structures using this criterion are feedforward transversal equalizers (FFE) and decision-feedback equalizer (DFE) using the least-mean square (LMS) algorithm or its variations [3]. The second method obtains error signal by sampling the equalizer output and then analyzing its characteristics in the time domain [4], [5]. An example is to monitor the eye opening of the equalized signal [6].…”

Section: Introductionmentioning

confidence: 99%

A Digital Power Spectrum Estimation Method for the Adaptation of High-Speed Equalizers

Lin

Liu

2004

IEEE Trans. Circuits Syst. I

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This paper presents a new method to estimate the power spectrum of digital signals, which is then used to generate an error signal to tune Gbps data rate equalizers for digital communications. The proposed power spectrum estimation method can be realized with standard digital circuits and has been fabricated and tested in 0.35-m CMOS technology for 1-Gbps data rate. Compared with the traditional bandpass filter followed by a rectifier implementation, this method has wider input signal range and is scalable to higher speed technologies beyond the gigahretz range, in addition to largely reduced power dissipation and die area. Also presented are system simulations on the bit-error rate performance and the error space analysis of the proposed method in comparison with the method of using a bandpass filter followed by a rectifier.

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Section: Introductionmentioning

confidence: 99%