A low-power digital matched filter for spread-spectrum systems

Abstract

A Digital Matched Filter (DMF) is an essential device for Direct-Sequence Spread-Spectrum (DS-SS) communication systems. Reducing the power consumption of a DMF is especially critical for battery-powered terminals. The reception registers and the correlation-calculating unit dissipate the majority of the power in a DMF. In this paper we discuss this problem and propose a lowpower architectural approach to a DMF. The total switching activity factor and the switched capacitance are reduced. As a result of power analysis at the gate level, the implementation of the proposed architecture in a standard 0.18ym CMOS technology achieved a reduction in the power consumption of more than 70%.

New Partial Correlation-type Matched Filter for Zero Correlation Duration Sequence and its Advanced Television Systems Committee-Digital Television Application

“…The proposed DTV TxID MF based on interference free Ternary ZCD sequence and the conventional correlator are compared by implementing various algorithms [8][9][10] in this section.…”

“…Table III shows the performance comparison between the conventional MFs [8][9][10] and the proposed MF using interference free ZCD spreading sequence for DTV TxID, which is measured through partial correlation matched circuit environment. According to the Table III, the proposed MF is superior to the conventional MF in the view of logic gate number and power consumption.…”