A low-power dual band all digital PLL with precision dual mode DCO and digital linearization control circuits

Abstract

In the present article, a low-power dual band all digital PLL is proposed. Our recently developed dual band oscillator used in the structure of this dual band ADPLL. In the proposed ADPLL, toggling the input control bit utilizes the ADPLL to switch between two different frequency bands. Sustaining coarse and fine characteristics and with a combination of capacitive shift and Schmitt trigger techniques, this oscillator changes the trigger points of the circuit and thus results in variable delay and therefore, in creation of two different frequency bands. This can be used in situation when there is a need to switch between two different frequencies for two different application or multi-standard bands. In such an occasion, instead of using two ADPLLs, the proposed structure, which reduces the needed area, utilized. Moreover, in this method, there is no need for redesigning and evaluating the degree of stability against voltage changes, temperature and process of two ADPLLs. Simulation of the proposed dual band ADPLL is performed with HSPICE by a voltage VDD=1.8v in 180nm and CMOS technology. The frequency of the proposed oscillator ranges from 97.18MHz to 117.65MHz in lower band and 134.05MHz to 177.03MHz in the upper band.Keywords-Dual-band all digital phase locked loop, Dual-band digitally controlled oscillator, Phase and frequency detector, jitter, low power