2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) 2016
DOI: 10.1109/rfic.2016.7508243
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A low power high performance PLL with temperature compensated VCO in 65nm CMOS

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Cited by 11 publications
(3 citation statements)
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“…It can be seen that the temperature drift characteristics of VCO can be effectively reduced by using dual inductances. In parallel inductance mode, the L-T curve shows a negative temperature coefficient, while in single inductance mode, the L-T curve shows a positive temperature coefficient [7,8,9]. The curve of the capacitance varies with temperature shows a positive temperature trend.…”
Section: Vco Designmentioning
confidence: 98%
“…It can be seen that the temperature drift characteristics of VCO can be effectively reduced by using dual inductances. In parallel inductance mode, the L-T curve shows a negative temperature coefficient, while in single inductance mode, the L-T curve shows a positive temperature coefficient [7,8,9]. The curve of the capacitance varies with temperature shows a positive temperature trend.…”
Section: Vco Designmentioning
confidence: 98%
“…Equivalent circuit of the spiral inductor [13] where, µ0 is the vacuum permeability, N is the number of inductor turns, a is the distance from the center of the inductor to the middle of the windings and D is the diameter of windings. The values of capacitors can be obtained from (10), (11) and 12 where, W, L, N, Csub, ε ox , and t ox are metal width, total length of the spiral, number of turns, body capacitance, silicon di oxide electrical permittivity and thickness of the oxide, respectively.…”
Section: 1 Inductor Capacitorsmentioning
confidence: 99%
“…Several methods are proposed to compensate frequency drift over temperature [6]- [11]. Placing VCO in a synthesizer loop is a solution for this problem [12].…”
Section: Introductionmentioning
confidence: 99%