A Low Power, High SFDR, ROM-Less Direct Digital Frequency Synthesizer

“…Using this technique, high spectral purity can be achieved though power consumption will be significant. Many attempts have been subsequently made to implement a low-power along with high spectral purity DDFS (Kesoulis et al, 2007;Jafari et al, 2005;Li et al, 2008;Omran et al, 2009). In this work, a high-speed, low-power, DDFS architecture with high SFDR based on pipelined CORDIC algorithm is used to perform the up-conversion in the common modulator.…”

Section: Direct Digital Frequency Synthesiser (Ddfs)mentioning

confidence: 99%

Programmable Common Baseband Modulator for Software Defined Radio system

Hatai

Chakrabarti

2011

IJSISE

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In Software Defined Radio (SDR), a single hardware structure can be reused to conform to different standards by simply changing some parameter. A low-power, high-speed, low-area parameter-controlled Common Baseband Modulator (CBM) architecture has been proposed in this paper. Using control parameters, the proposed CBM can be configured to support Gaussian Minimum Shift Keying (GMSK) as well as Frequency Modulation (FM) schemes. The design, which is fully pipelined, can operate at a maximum data rate of 276 Mbps. The proposed CBM consumes maximum dynamic power of 108.41 mW when running at 100 Mbps and using only 22.7 kilo equivalent gates.

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“…As distinct from analog or indirect synthesizers, DDFSs provide high frequency resolution, fast switching speed, continuous phase switching, small physical area and low power dissipation [1]. For the last 10 years, works on the frequency synthesizers are focused on minimizing the used area and power dissipation while keeping the spectral purity above an acceptable level [2], [3] and [4]. High frequency synthesizers are also studied with some recently offered approaches [5], [6] and [7].…”

Section: Introductionmentioning

confidence: 99%

Direct Digital Frequency Synthesizer Designs in MATLAB

Acar¹,

Yaldiz²

2016

International Journal of Applied Mathematics, Electronics and Computers

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This study presents the structure of the Direct Digital Frequency Synthesizers (DDFSs) which have several advantages compared to conventional synthesizers such as high frequency, fast switching speed and low power dissipations. In order to lessen the physical area and power dissipation, ROM compression techniques are applied in designs. Bipartite Table Method (BTM) and Multipartite Table Method (MTM) are utilized in this study because of the fact that they provide high compression rates.

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A Low Power, High SFDR, ROM-Less Direct Digital Frequency Synthesizer

Cited by 17 publications

References 14 publications

A direct digital frequency synthesizer based on ROM free algorithm

A direct digital frequency synthesizer based on ROM free algorithm

Programmable Common Baseband Modulator for Software Defined Radio system

Direct Digital Frequency Synthesizer Designs in MATLAB

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