2014
DOI: 10.1109/tcsi.2014.2335391
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A Low-Power Low-Complexity Multi-Standard Digital Receiver for Joint Clock Recovery and Carrier Frequency Offset Calibration

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Cited by 7 publications
(3 citation statements)
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“…2(b), where N=256 for IEEE 802. 16. To significantly reduce buffer requirements, we delay computation of the IFO by 12 symbols, so that the compensation shift is always positive: S IFO = {0 : 4 : 28}.…”
Section: A Proposed Algorithmmentioning
confidence: 99%
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“…2(b), where N=256 for IEEE 802. 16. To significantly reduce buffer requirements, we delay computation of the IFO by 12 symbols, so that the compensation shift is always positive: S IFO = {0 : 4 : 28}.…”
Section: A Proposed Algorithmmentioning
confidence: 99%
“…12 is optimised for QPSK modulated pilots (since their amplitudes are identical) as specified in IEEE 802. 16, as well as in most OFDM-based standards. The normalisation performed in (7) allows the correlation to be reduced to two DSP blocks operating as 3-input adders (instead of 4 DSP blocks with multipliers as would be usual).…”
Section: B Proposed Approachmentioning
confidence: 99%
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