Relaxation oscillators are preferred in low-frequency applications due to their lower power consumption and superior temperature stability. However, frequency errors arise from variations in the comparator’s offset voltage and delay time due to PVT changes. To address these issues, this paper proposes the low-power delay time cancellation (DTC) technique and several enhancement methods, including a novel offset trimming approach, an error state detection and recovery (ESDAR) circuit, and a specialized frequency-trimming method. Simulation results for an 8 MHz relaxation oscillator in a 40 nm CMOS process show that the proposed DTC technique and enhancements improve frequency variation due to power supply fluctuations to ±0.05% and reduce temperature-induced frequency variation to ±0.4%.