A low power multiple-gate mixer for WiMAX system

Hsiao, Chih-Lung; Huang, Yilun

doi:10.1109/icmee.2010.5558541

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2013

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“…The mixer in Ref. [7] is based on a crosscoupled RF PMOS and a multiple-gate folded structure. Its results show a moderate linearity performance with a high CG and a low noise.…”

Section: Simulation and Measurement Resultsmentioning

confidence: 99%

Design of a novel mixer with high gain and linearity improvement for DRM/DAB applications

Wang¹,

Wang²,

Ouli³

et al. 2013

J. Semicond.

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This paper focuses on a new design of a down-conversion mixer for a low-IF wideband receiver. Based on the folded structure and differential multiple gated transistor (DMGTR) technique, a novel quadrature mixer with a high conversion gain, a moderate linearity, and a moderate NF is proposed. The mixer is designed and implemented in a 0.18-m CMOS process, and can operate in a frequency range from 150 kHz to 1.5 GHz. The circuit performance is confirmed by both simulation and measurement results. The measurement results exhibit a peak conversion gain of 13.35 dB, a high third order input referred intercept point of 14.85 dBm, and a moderate single side band noise figure of 10.67 dB. Moreover, the whole quadrature mixer core occupies a compact die area of 0.122 mm 2 . It consumes a current of 3.96 mA (excluding the output buffers) under a single supply voltage of 1.8 V.

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“…The mixer in Ref. [7] is based on a crosscoupled RF PMOS and a multiple-gate folded structure. Its results show a moderate linearity performance with a high CG and a low noise.…”

Section: Simulation and Measurement Resultsmentioning

confidence: 99%