2013
DOI: 10.1007/978-3-642-37291-9_66
|View full text |Cite
|
Sign up to set email alerts
|

A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner

Abstract: Abstract. This paper presents a new CMOS buffer circuit topology for radiofrequency (RF) applications based on a fully-differential voltage-combiner circuit, capable of operating at low-voltage. The proposed circuit uses a combination of common-source (CS) and common-drain (CD) devices. The simulation results show good levels of linearity and bandwidth. To improve total harmonic distortion (THD) a source degeneration technique is used. The proposed circuit has been designed in a 130nm logic CMOS technology and… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
2
0

Year Published

2014
2014
2021
2021

Publication Types

Select...
1
1

Relationship

1
1

Authors

Journals

citations
Cited by 2 publications
(2 citation statements)
references
References 5 publications
0
2
0
Order By: Relevance
“…In this amplifier, the transistor gate terminal is connected to the output of the CS and CD amplifiers. The main advantages of this structure are the noise cancellation between amplifiers (differential output) [35,37] and the supply current feature to the loads. At the output, 100 X resistors are connected to the amplifiers; 3.…”
Section: Active Balun Blockmentioning
confidence: 99%
“…In this amplifier, the transistor gate terminal is connected to the output of the CS and CD amplifiers. The main advantages of this structure are the noise cancellation between amplifiers (differential output) [35,37] and the supply current feature to the loads. At the output, 100 X resistors are connected to the amplifiers; 3.…”
Section: Active Balun Blockmentioning
confidence: 99%
“…The low-voltage DTMOS technique was chosen as the approach to use because of the simplicity of the implementation, since it basically consists in disconnecting the bulks of the PMOS and NMOS devices, respectively from and V SS , and re-connect them to the gate terminal [4,5].…”
Section: Proposed Modifications In the Original Amplifiermentioning
confidence: 99%