A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids

Adrian, Victor; Chang, Joseph S.; Gwee, Bah-Hwee

doi:10.1109/tcsi.2008.2001831

Cited by 23 publications

(12 citation statements)

References 16 publications

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“…In class-A amplifier, the input signal is applied to the base of BJT and the output signal is driven out from its collector. It should be noted that the efficiency of class-A amplifier is less than 50% [1,3].…”

Section: Introductionmentioning

confidence: 99%

“…The utilized method in the modulation stage can be divided into two categories: (1) Pulse Width Modulation (PWM) [3], and (2) Pulse Density Modulation (PDM) such as delta sigma modulator [4]. In the PWM modulation, the comparator generates a pulse signal based on the input signal and a carrier signal, but this method leads to unwanted signals and harmonics due to carrier signal's low frequency [5].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Design of Novel Low-Power and High-Efficiency Class-d Audio Amplifier

Hajhashemkhani¹,

Karimi²,

Rezai³

2017

IJCA

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Design of Novel Low-Power and High-Efficiency Class-d Audio Amplifier

Hajhashemkhani¹,

Karimi²,

Rezai³

2017

IJCA

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“…These DACs often employ the wellknown ΔΣ modulation scheme [1], commonly used in audio data-converters and switching-amplifiers [2], to lower the requirements for analog circuitries of the DAC at the expense of higher digital circuit complexity. For example, the required number of current-source cells can be greatly reduced in current-steering DACs that are preceded by ΔΣ modulators [3].…”

Section: Introductionmentioning

confidence: 99%

Design of a 5 GS/s fully-digital digital-to-analog converter

Adrian

Sun

Chang

2014

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

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We present a fully-digital digital-to-analog converter (FD DAC) architecture design for high-speed communication systems. The FD DAC design is based on the ΔΣ modulation. The specifications for the DAC includes a low 1.2 V supply voltage, a high 5 GS/s input sampling rate, and a wide 2.5 GHz bandwidth. We employ a combination of the timeinterleaving, parallel, and pipelining techniques to reduce the clock speed from 10 GHz to 625 MHz. The lower clock speed allows the use of standard cells for designing the digital computational circuits of the FD DAC. The critical building blocks of the FD DAC are laid-out in a 65 nm CMOS process. The post-layout simulation results show that the Signal to Noise and Distortion Ratio and the in-band Spurious-Free Dynamic Range of the output signal are 36 dB and 44 dBc respectively.

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“…Interests in high-efficiency audio amplifiers with low power consumption have been increasing for portable applications, such as hearing instruments, wireless headsets, and mobile phones [1]. Since the peak-toaverage ratio (PAR) of an audio signal is 9 to 15 dB, linear amplifiers such as class-A or class-AB amplifiers have significantly reduced efficiency for the backed-off region from the peak output power and are not suitable for portable audio systems [2,3].…”

Section: Introductionmentioning

confidence: 99%

Low-Power and High-Efficiency Class-D Audio Amplifier Using Composite Interpolation Filter for Digital Modulators

Kang¹,

Kim²,

Gu³

et al. 2014

JSTS:Journal of Semiconductor Technology and Science

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Abstract-This paper presents a high-efficiency digital class-D audio amplifier using a composite interpolation filter for portable audio devices. The proposed audio amplifier is composed of an interpolation filter, a delta-sigma modulator, and a class-D output stage. To reduce power consumption, the designed interpolation filter has an optimized composite structure that uses a direct-form symmetric and Lagrange FIR filters. Compared to the filters with homogeneous structures, the hardware cost and complexity are reduced by about half by the optimization. The coefficients of the digital deltasigma modulator are also optimized for low power consumption. The class-D output stage has gate driver circuits to reduce shoot-through current. The implemented class-D audio amplifier exhibited a high efficiency of 87.8 % with an output power of 57 mW at a load impedance of 16 Ω and a power supply voltage of 1.8 V. An outstanding signal-to-noise ratio of 90 dB and a total harmonic distortion plus noise of 0.03 % are achieved for a single-tone input signal with a frequency of 1 kHz.

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A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids

Abstract: A low voltage micropower digital Class D amplifier modulator for hearing aids

Cited by 23 publications

References 16 publications

Design of Novel Low-Power and High-Efficiency Class-d Audio Amplifier

Design of Novel Low-Power and High-Efficiency Class-d Audio Amplifier

Design of a 5 GS/s fully-digital digital-to-analog converter

Low-Power and High-Efficiency Class-D Audio Amplifier Using Composite Interpolation Filter for Digital Modulators

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