2014
DOI: 10.1109/tcsii.2014.2345297
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A <inline-formula> <tex-math notation="TeX">$g_{m}/I_{D}$</tex-math></inline-formula>-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier

Abstract: Noise optimization is a challenging problem for nanoscale metal-oxide-silicon field-effect transistor circuits. This brief presents a technique that uses transconductance-to-drain current (g m /I D )-dependent transistor-noise parameters to explore the design space and to evaluate tradeoff decisions. An expression for the corner frequency of the folded-cascode amplifier is derived. The design process demonstrated in this brief using the folded-cascode amplifier is applicable to a wide class of amplifier circui… Show more

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Cited by 33 publications
(3 citation statements)
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“…M N 1 -M N 2 and M P4 -M P5 operate in strong inversion in order to minimize g m, p4 /g m, p1 and g m,n1 /g m, p1 ratios. A detailed design strategy of noise optimization for folded-cascode OTA is out of the scope of this study and has been thoroughly discussed in [33].…”
Section: Circuit Design Of a Chopper Ccia With Vm-dslmentioning
confidence: 99%
“…M N 1 -M N 2 and M P4 -M P5 operate in strong inversion in order to minimize g m, p4 /g m, p1 and g m,n1 /g m, p1 ratios. A detailed design strategy of noise optimization for folded-cascode OTA is out of the scope of this study and has been thoroughly discussed in [33].…”
Section: Circuit Design Of a Chopper Ccia With Vm-dslmentioning
confidence: 99%
“…The primary elements that must be considered when designing the amplifier are stability and low power dissipation. To realize high gm/Id efficiency and low power consumption, the input transistors are designed to be operated in the subthreshold region [25]. A folded-cascode amplifier is selected as the first step in the design of a low power opamp.…”
Section: Proposed Structurementioning
confidence: 99%
“…In terms of noise, the main contributors are the input pair transistors M 1 and M 2 , as well as transistors close to power rails M 3 , M 4 , M 10 , M 11 as described in [140]. M 1 and M 2 were implemented with native transistors because they have lower noise levels in this technology.…”
Section: Folded Cascode Branches Have Been Designed Taking Into Accou...mentioning
confidence: 99%