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Previous studies have shown that a transistor's transconductance-to-drain-current ratio is useful for optimizing analog circuits. In this paper, we derive an expression that captures the second order distortion generated at the output of an envelope detector. We use the derived expression, along with the nonlinear Taylor series coefficients to design a 3 µA envelope detector in 0.13 µm CMOS process.

We present an uni¯ed explanation of the transconductance-to-drain current (g m =I D )-based noise analysis in this paper. We show that both thermal noise coe±cient () and device noise corner frequency (f co ) are dependent on the g m =I D of a transistor. We derive expressions to demonstrate the relationship between the normalized noise power spectral density technique and the technique based on and f co . We conclude this letter with examples to demonstrate the practical implication of our study. Our results show that while both techniques discussed in this letter can be used to compute noise numerically, using and f co to separate thermal noise from°i cker noise provides additional insight for optimizing noise.

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