BMAS 2005. Proceedings of the 2005 IEEE International Behavioral Modeling and Simulation Workshop, 2005.
DOI: 10.1109/bmas.2005.1518181
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A methodology for modeling lateral parasitic transistors in smart power ICs

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Cited by 4 publications
(1 citation statement)
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“…This option requires a complex mathematical formulation that cannot be easily extended to more complex problems or geometries when drift current has an important role and it requires a dedicated software that cannot be integrated with actual circuit simulators and Process Design Kits (PDK) of foundries. On the other side, the most promising approach to integrate minority carriers simulation in circuit simulators is the one proposed by Oehmen et al [8]. It consists to mesh the substrate in spheres and solve the semiconductor equations by means of Kirchhoff laws.…”
Section: Introductionmentioning
confidence: 99%
“…This option requires a complex mathematical formulation that cannot be easily extended to more complex problems or geometries when drift current has an important role and it requires a dedicated software that cannot be integrated with actual circuit simulators and Process Design Kits (PDK) of foundries. On the other side, the most promising approach to integrate minority carriers simulation in circuit simulators is the one proposed by Oehmen et al [8]. It consists to mesh the substrate in spheres and solve the semiconductor equations by means of Kirchhoff laws.…”
Section: Introductionmentioning
confidence: 99%