A modified asymmetric cascaded multilevel DC–AC converter with switched diodes using FPGA processor implementation

Prasad, Devalraju; Mahadevan, K.; Prasanna, M. Arul

doi:10.1016/j.micpro.2020.103019

Cited by 6 publications

(5 citation statements)

References 25 publications

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“…The intention of obtaining huge voltage levels with minimized switching components using hybrid modulation a modified cascaded multilevel converter has been developed, and the experimental set up is made with switched diodes. A good agreement between simulation and experimental results has been validated (Arun Prasad et al, 2020). The topology suggested by A. Al-Judi is a twosome stage MLI, wherein a H bridge is mandatory like MLDCLI, and each DC source forms a cell with one power switch and a bypass diode (Al-Judi and Nowicki, 2013).The level-dependent sources concoction MLI has been suggested, which intelligently adds the DC sources in either series or parallel to achieve the required level in the output (Edwin Jose and Titus, 2016).…”

Section: Introductionmentioning

confidence: 61%

A new tapped sources stack succored modified HX bridge MLI

Chandrasekaran

Mohanty

Ranganathan

2020

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Purpose Multilevel inverter (MLI) is a prevailing sensible alternative to two-level inverters that offer a high-quality output voltage waveform, wherein the multiple input direct current (DC) levels are established by using isolated DC sources, batteries and renewable energy sources. The purpose of this paper is to develop MLI to offer lower total harmonic distortion (THD), higher output voltage levels and reduced switching components for high power applications. Design/methodology/approach In this paper, a new tapped sources stack succored modified HX bridge MLI (TSSSMHXBMLI) topology is proposed which includes two modules, such as tapped sources stack (TSS) and modified HX bridge inverter, which perform their function in a single stage. Also, this paper outlines the formulaic implementation of the multicarrier/sub-harmonic pulse width modulation (MCPWM/SHPWM) in a Xilinx Spartan3E-500 field programmable gate array (FPGA) is suitable for the developed MLI. Findings The feasibility of the suggested topology is well proved by both simulation and experiment results. Practical implications This paper examines a new topology of TSSSMHXBMLI with a view to minimize total count of switching components against basic MLI topologies. The operating sequence of the suggested TSSSMHXBMLI topology is verified with the simulation study followed by an experimental investigation. Originality/value The simulation and experimental results of suggested MLI topology reveals to obtain lower THD, higher output voltage levels and reduced switching components for high power applications.

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Section: Introductionmentioning

confidence: 61%

A new tapped sources stack succored modified HX bridge MLI

Chandrasekaran

Mohanty

Ranganathan

2020

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“…The design of MLI topologies depends on the number of voltage levels, total harmonic distortion (THD), modularity, extension model, total standing voltage (TSV), and the number of power components such as power switches, DC sources, diodes and capacitors 11 . Researchers have focused on new MLI topologies with a lower number of power components to overcome the shortcomings of traditional topologies 12–18 …”

Section: Introductionmentioning

confidence: 99%

“…11 Researchers have focused on new MLI topologies with a lower number of power components to overcome the shortcomings of traditional topologies. [12][13][14][15][16][17][18] Some researchers have worked on studies to improve the existing MLI topologies based on application. In Majumdar et al, 19 it is shown that the implementation of distributed maximum power point tracking (MPPT) enables multilevel inverters to achieve higher performance under non-uniform partial shading conditions in PV systems.…”

mentioning

confidence: 99%

Design of a 21‐level multilevel inverter with minimum number of devices count

Karakılıç

Hataş

Almalı

2023

Circuit Theory & Apps

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SummaryMultilevel inverters (MLIs) have attracted the attention of researchers for their needs in industrial applications, renewable energy systems, and electric vehicles. MLIs require a large number of power electronic components to synthesize higher levels at the output voltage. However, overuse of power electronic devices increases the complexity, losses, and cost of MLIs. In this study, a new MLI has been proposed with a reduced number of power switches. The basic unit of the proposed MLI comprises only three independent DC sources and 10 switches (eight unidirectional and two bidirectional) to produce 21 levels at the output voltage waveform. The nearest level control (NLC) modulation method has been used to produce gate pulses. Furthermore, three extension topologies have been proposed to generate a higher number of levels, and the extension parameters have been compared with recently introduced and conventional topologies. The comparative study shows that the proposed MLI topology requires fewer components in terms of power electronics parameters than the others. On the other hand, the presented first extension study that can be used for all non‐extendable basic units is one of the prominent values of the study. Simulation studies showing modulation methods, switching patterns, and signal outputs were performed with Matlab/Simulink. A prototype of the proposed main module has been realized and tested in the laboratory with an FPGA processing board. Experimental results have been verified with simulation results, and the performance of the proposed topology has been proven.

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“…11 . Researchers have focused on new MLI topologies with a lower number of power components to overcome the shortcomings of traditional topologies 12,13,14,15,16,17,18,19 .…”

Section: Introductionmentioning

confidence: 99%

Design of a 21-level multilevel inverter with minimum number of devices count

Hataş

Karakılıç

Almalı

2023

Preprint

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Multilevel inverters (MLIs) have attracted the attention of researchers for their needs in industrial applications, renewable energy systems, and electric vehicles. MLIs require a large number of power electronic components to synthesize higher levels at the output voltage. However, overuse of power electronic devices increases the complexity, losses, and cost of MLIs. In this study, a new MLI has been proposed with a reduced number of power switches. The basic unit of the proposed MLI comprises only three independent DC sources and ten switches (eight unidirectional, and two bidirectional) to produce 21 levels at the output voltage waveform. The nearest level control (NLC) modulation method has been used to produce gate pulses. Furthermore, three extension topologies have been proposed to generate a higher number of levels and the extension parameters have been compared with recently introduced and conventional topologies. The comparative study shows that the proposed MLI topology requires fewer components in terms of power electronics parameters than the others. On the other hand, the presented first extension study can be used for all non-extendable basic units is one of the prominent values of the study. Simulation studies showing modulation methods, switching patterns, and signal outputs were performed with Matlab/Simulink. A prototype of the proposed main module has been realized and tested in the laboratory with an FPGA processing board. Experimental results have been verified with simulation results, and the performance of the proposed topology has been proven.

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A modified asymmetric cascaded multilevel DC–AC converter with switched diodes using FPGA processor implementation

Cited by 6 publications

References 25 publications

A new tapped sources stack succored modified HX bridge MLI

A new tapped sources stack succored modified HX bridge MLI

Design of a 21‐level multilevel inverter with minimum number of devices count

Design of a 21-level multilevel inverter with minimum number of devices count

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