A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade

Mohr, Raimon Casanova; Casse, G.; Grinstein, S.; Figueras, E. Vilella; Voosebeld, Joost

doi:10.22323/1.313.0039

Cited by 4 publications

(9 citation statements)

References 2 publications

(2 reference statements)

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“…At very high fluences, when acceptor removal is finished, the effective doping concentration is similar in all substrates regardless of the initial resistivity [25]. Measurements of the charge collection efficiency with a 90 Sr source to emulate MIPs reveal a signal reduction of approximately 30% after neutron irradiation to 10 14 1 MeV neq/cm 2 for the unthinned devices. In contrast, for the thinned devices, more than 4k electrons are collected after irradiation to a fluence of 2 x 10 15 1 MeV neq/cm 2 as a voltage of over 350 V can be used to bias the device [24].…”

Section: Nm Hr/hv-cmos Node From Lfoundrymentioning

confidence: 95%

“…Recently, HR wafers have also become available in the production line of foundries that manufacture HV-CMOS processes, and DMAPS in HR/HV-CMOS are now also possible to further improve the performance of the sensor [11][12][13]. Today's most performant DMAPS detectors are 50 µm thin and have 50 µm x 50 µm cell size with integrated mixed analog and digital readout electronics [14], 11 ns time resolution [15] and 5 x 10 15 1 MeV neq/cm 2 radiation tolerance [16].…”

Section: Dmapsmentioning

confidence: 99%

“…Following from work in the wider community, the CERN-RD50 collaboration has started specific developments in the 150 nm HR/HV-CMOS process from LFoundry. Two test chips, named RD50-MPW1 and RD50-MPW2, have been designed and submitted for fabrication by the collaboration [14]. A large area demonstrator, named RD50-ENGRUN1, with several large matrices of pixels is being designed.…”

Section: Development Of Dmaps With the Cern-rd50 Collaborationmentioning

confidence: 99%

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Time resolution and radiation tolerance of depleted CMOS sensors

Figueras¹,

Barrientos²,

Casanovas³

2019

Proceedings of the 27th International Workshop on Vertex Detectors — PoS(VERTEX2018)

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Depleted Monolithic Active Pixel Sensors (DMAPS), also known as depleted CMOS sensors, are extremely attractive for particle physics experiments. As the sensing diode and readout electronics can be integrated on the same silicon substrate, DMAPS remove the need for hybridization. This results in thin detectors with reduced production time and costs. To achieve high speed and high radiation tolerance, DMAPS are manufactured in High Voltage (HV) processes on High Resistivity (HR) wafers. Today's most performant DMAPS are 50 µm thin and have 50 µm x 50 µm cell size with integrated mixed analog and digital readout electronics, 11 ns time resolution and 5 x 10 15 1 MeV neq/cm 2 radiation tolerance. DMAPS in HR/HV-CMOS have been adopted as the sensor technology for the pixel tracker for the Mu3e experiment and are under consideration for the ATLAS detector Phase-II Upgrade. However, in spite of the major improvements demonstrated by DMAPS, further research to achieve even more performant sensors is needed to realize the full potential of these sensors to meet the most challenging requirements for particle physics experiments planned for the future. This article describes the state-of-the-art of DMAPS in terms of time resolution and radiation tolerance, and presents specific work done by the CERN-RD50 collaboration to further develop the performance of these sensors.

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Section: Nm Hr/hv-cmos Node From Lfoundrymentioning

confidence: 95%

Section: Dmapsmentioning

confidence: 99%

Section: Development Of Dmaps With the Cern-rd50 Collaborationmentioning

confidence: 99%

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Time resolution and radiation tolerance of depleted CMOS sensors

Figueras¹,

Barrientos²,

Casanovas³

2019

Proceedings of the 27th International Workshop on Vertex Detectors — PoS(VERTEX2018)

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“…The prototype ASIC, which has an approximate size of 5 mm x 5 mm, has been fabricated in two high resistivity substrates with nominal values of 500 Ω•cm -1.1 kΩ•cm and 1.9 kΩ•cm (measured to be 600 Ω•cm and 1.1 kΩ•cm respectively) to achieve large depletion regions. It is a much improved version of a previous design that was developed outside the CERN-RD50 collaboration [2]. The following paragraphs will focus on the matrix aimed at particle physics experiments only.…”

Section: Design Of Rd50-mpw1mentioning

confidence: 99%

Recent depleted CMOS developments within the CERN-RD50 framework

Figueras¹

2020

Proceedings of the 28th International Workshop on Vertex Detectors — PoS(Vertex2019)

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Depleted CMOS sensors are groundbreaking position sensitive detectors that offer a competitive and cost-effective solution for a large range of particle tracking applications. In spite of their substantial advantages, these sensors require further research to become even more performant and meet the ever more demanding requirements of particle physics experiments planned for the near future. In this context, the CERN-RD50 collaboration has started a new R&D programme to study and develop depleted CMOS sensors as one of its main priorities. This article presents the depleted CMOS R&D programme within the CERN-RD50 collaboration. It describes the design aspects of the two prototype ASICs developed so far, which are in a 150 nm High Voltage-CMOS (HV-CMOS) process and manufactured on high resistivity substrates. The first prototype ASIC, named RD50-MPW1 and delivered after fabrication in April 2018, integrates a matrix of 50 μm x 50 μm pixels with all the analogue and digital readout electronics for column drain readout embedded in their sensing areas. The second prototype ASIC, named RD50-MPW2 and delivered after fabrication in January 2020, integrates a matrix of 60 μm x 60 μm pixels with analogue readout electronics to reduce the sensor response time. RD50-MPW2 incorporates new methods to optimise the leakage current of the sensor. The article discusses laboratory measurements of the performance evaluation of RD50-MPW1, while those of RD50-MPW2 will be published elsewhere.

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“…More details about the design of this chip can be found in Ref. [9]. First LF2 chips have been recently delivered.…”

Section: Lf2mentioning

confidence: 99%