2013
DOI: 10.1002/mcda.1497
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A MOO‐based Methodology for Designing 3D Stacked Integrated Circuits

Abstract: In the past decades, the micro-electronic industry has been following the Moore's law to improve the performance of integrated circuits (ICs). However, it will probably be impossible to follow this law in the future due to physical limitations appearing with the miniaturization of the transistors below a certain threshold. In order to overcome this problem, new technologies have emerged, and among them the two-dimensional stacked integrated circuits (3D-SIC) have been proposed to keep the Moore's momentum aliv… Show more

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Cited by 3 publications
(1 citation statement)
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“…For instance, when facing the development of new 3D Stacked Integrated Circuits (SIC), one has to minimize the cost, the interconnection global length, the package volume, the thermal dissipation, the power consumption, etc. This problem can be modelled as a multi-objective combinatorial optimization problem leading to a huge number of possible design options [1].…”
Section: Introductionmentioning
confidence: 99%
“…For instance, when facing the development of new 3D Stacked Integrated Circuits (SIC), one has to minimize the cost, the interconnection global length, the package volume, the thermal dissipation, the power consumption, etc. This problem can be modelled as a multi-objective combinatorial optimization problem leading to a huge number of possible design options [1].…”
Section: Introductionmentioning
confidence: 99%