A multi-purpose memory switch LSI for ATM-based systems

Abstract

An TM switching system should be capable of handling multimedia traffic, which has different bit-rates and diversiied quality requirements. A self-routing switch is a key piece of equipment for attaining this goal. This paper proposes. a new switch construction and describes its LSI design and fabrication.The proposed switch, which is a memory switch with dynamic link speed control, can dynamically change link speeds according to traffic flow, thereby achieving high performance in any imbalanced traffic condition. The switch element also functions as a multiplexer/demultiplexer and an inserter/dropper. Thus, the proposed LSI is expected to be a key component in ATM-based equipment.A 4x4 memory switch LSI using 0.8-pm BiCMOS technology is developed, and a switching network with a capacity of 256 155-Mb/s lines is tested. Results show that the proposed LSI makes possible a compact, economical ATM switching system.

Current architectures for ATM implementation

“…The experimental ATM system developed by NTT [51] can be described as an L + M" + L single-route switching fabric: the L-switch at the outputs is not strictly necessary, from a functional point of view, but has been introduced to avoid the need of arbitrating the access of the various input interfaces to the pool of VCIs available at each output port, thus allowing the implementation of a fully distributed control architecture. The multiplex switch described in [51] can be considered at the top level as a 3-stage Clos arrangement, with module sizes 4 x 4, 64 x 64 and 4 X 4 respectively. The inner 64 x 64 modules are realized with parallel planes of banyan networks made of 4 x 4 elements: plane parallelism and an internal 4:l speed advantage make these modules nonblocking.…”

“…In the VLSI implementation described in [51] a 0.8 pm BiCMOS process is employed, which allows a speed of up to 620 Mbit/s on every 4 bit parallel port. The buffer size is only 31 cells.…”