A Multilevel Gate Driver of SiC mosfets for Mitigating Coupling Noise in Bridge-Leg Converter

He, Qiusen; Zhu, Yuyu; Zhang, Hanyu; Huang, Anfeng; Cai, Qiang‐Ming; Kim, Hongseok

doi:10.1109/temc.2019.2953186

Cited by 18 publications

(4 citation statements)

References 25 publications

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“…Solutions for the gate drive to mitigate the common modo noise [217] or resonant circuits [218] and equipped with optical fiber for the gate control signals can also be found. Other driver systems can be found in [219,220].…”

Section: Fault Tolerance Applied On Mlc and Gate-driver Circuitsmentioning

confidence: 99%

A Comprehensive Review on Modular Multilevel Converters, Submodule Topologies, and Modulation Techniques

2022

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The concept of the modular multilevel converter (MLC) has been raising interest in research in order to improve their performance and applicability. The potential of an MLC is enormous, with a great focus on medium- and high-voltage applications, such as solar photovoltaic and wind farms, electrified railway systems, or power distribution systems. This concept makes it possible to overcome the limitation of the semiconductors blocking voltages, presenting advantageous characteristics. However, the complexity of implementation and control presents added challenges. Thus, this paper aims to contribute with a critical and comparative analysis of the state‑of‑the‑art aspects of this concept in order to maximize its potential. In this paper, different power electronics converter topologies that can be integrated into the MLC concept are presented, highlighting the advantages and disadvantages of each topology. Nevertheless, different modulation techniques used in an MLC are also presented and analyzed. Computational simulations of all the modulation techniques under analysis were developed, based on four cascaded full-bridge topologies. Considering the simulation results, a comparative analysis was possible to make regarding the symmetry of the synthesized waveforms, the harmonic content, and the power distribution in each submodule constituting the MLC.

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Section: Fault Tolerance Applied On Mlc and Gate-driver Circuitsmentioning

confidence: 99%

A Comprehensive Review on Modular Multilevel Converters, Submodule Topologies, and Modulation Techniques

2022

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“…Figure 6 shows the soft turn-off driver for SiC MOSFET in HSF and FOF. SiC MOSFET uses the negative turn-off voltage [17][18][19][20]. Thus, the power supply of the soft turn-off driver is the negative voltage.…”

Section: E the Soft Turn-off Drivermentioning

confidence: 99%

The integrated fast short-circuit protection technique with soft turn-off for SiC MOSFET

Cao

Zhou²,

Shi³

et al. 2022

Microelectronics Reliability

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“…The gate voltage of GaN FET driver is usually controlled below 6 V, but the speed is relatively higher, which can up to 30 MHz [9][10][11][12][13][14][15]. The SiC MOSFET driver circuit needs larger gate charge driving ability, and the gate voltage is usually controlled at 12-20 V, which is comparable to conventional Si MOSFET and IGBT, but the speed is relatively low and most of the driver circuits are implemented in discrete devices [16][17][18][19][20][21][22][23][24]. There are few reports on high-speed gate driver that compatible with GaN FET and SiC MOSFET at the same time, and none of the frequency of the reported compatible drivers exceed 5 MHz [25][26][27][28][29].…”

Section: Introductionmentioning

confidence: 99%

A 20MHz 4A gate driver with 5.5 to 24V output drive voltage for wide bandgap FETs

Zhou

Yuan

et al. 2022

IEICE Electron. Express

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A high-speed gate driver circuit which can meet both GaN FET and SiC MOSFET is presented. High-speed output drive circuit with wide output drive voltage is introduced in the driver circuit to improve speed and efficiency. By using high-speed level shift circuit and floating step-down low dropout regulator (LDO) circuit, the signal amplitude of the internal circuit for the output drive circuit is reduced, and the speed is greatly improved. Based on the proposed output drive circuit, a galvanically isolated 20 MHz 4 A gate driver using capacitive coupling with 5.5 V to 24 V output drive voltage is design and implemented in 180 nm BCD process. Test results show the prototype gate driver achieves the rise and fall time of 2.2 ns and 2.5 ns respectively under 5.5 V supply for GaN FET driving, and the rise and fall time of 4.1 ns and 4.6 ns respectively under 24 V supply for SiC MOSFET driving with 20 MHz frequency.

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A Multilevel Gate Driver of SiC mosfets for Mitigating Coupling Noise in Bridge-Leg Converter

Cited by 18 publications

References 25 publications

A Comprehensive Review on Modular Multilevel Converters, Submodule Topologies, and Modulation Techniques

A Comprehensive Review on Modular Multilevel Converters, Submodule Topologies, and Modulation Techniques

The integrated fast short-circuit protection technique with soft turn-off for SiC MOSFET

A 20MHz 4A gate driver with 5.5 to 24V output drive voltage for wide bandgap FETs

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