A Multilevel NOSQL Cache Design Combining In-NIC and In-Kernel Caches

Tokusashi, Yuta; Matsutani, Hiroki

doi:10.1109/hoti.2016.022

Cited by 15 publications

(6 citation statements)

References 16 publications

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“…Unlike FPGA-based SmartNICs [28][29][30][31][32][33][34][35][36][37], multi-core SoC SmartNICs do not need to consolidate application logic into the programmable logic blocks of the NIC, which makes it easier to offload complex processing logic. These SmartNICs have multi-core processors in addition to on-board DRAM.…”

Section: Differences Between Off-path and On-path Smartnicsmentioning

confidence: 99%

A Comprehensive Study on Optimizing Systems with Data Processing Units

Sun¹,

Huang²,

Zhang³

et al. 2023

Preprint

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New hardware, such as SmartNICs, has been released to offload network applications in data centers. Off-path Smart-NICs, a type of multi-core SoC SmartNICs, have attracted the attention of many researchers. Unfortunatelly, they lack the fully exploration of off-path SmartNICs.In this paper, we use a BlueField SmartNIC as an example to conduct a systematical study on the advantages and disadvantages of off-path SmartNICs. We make a detailed performance characterization on an off-path SmartNIC including computing power and network communication overhead, and propose the following advices: 1) Directly utilize the specific accelerators on the SmartNIC to offload applications; 2) Offload latency-insensitive background processing to the Smart-NIC to reduce the load on the host; 3) Regard the SmartNIC as a new endpoint in the network to expand the computing power and storage resources of the server host; 4) Avoid directly employing the design method for systems based on on-path SmartNICs. We apply these advices to several use cases and show the performance improvements.

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Section: Differences Between Off-path and On-path Smartnicsmentioning

confidence: 99%

A Comprehensive Study on Optimizing Systems with Data Processing Units

Sun¹,

Huang²,

Zhang³

et al. 2023

Preprint

View full text Add to dashboard Cite

show abstract

“…AC-Key increases the adaptability and performance of the cache system by adjusting the size of the key-value cache, key pointer cache, and block cache. Y. Tokusashi et al have introduced FPGA-based hardware customisation to improve the performance of key-value pair caching [8]. They solve the problem of DRAM capacity limitation on FPGA by proposing a new multilayer cache architecture.…”

Section: Key-value Storementioning

confidence: 99%

Research on Multicore Key-Value Storage System for Domain Name Storage

2021

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This article proposes a domain name caching method for the multicore network-traffic capture system, which significantly improves insert latency, throughput and hit rate. The caching method is composed of caching replacement algorithm, cache set method. The method is easy to implement, low in deployment cost, and suitable for various multicore caching systems. Moreover, it can reduce the use of locks by changing data structures and algorithms. Experimental results show that compared with other caching system, our proposed method reaches the highest throughput under multiple cores, which indicates that the cache method we proposed is best suited for domain name caching.

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“…In addition, FPGAs can be applied to NoSQL databases. In [11], they proposed a multilevel NoSQL cache architecture that utilized both the hardware cache of FPGA and software cache implemented in OS kernel. These studies showed the hardware cache using FPGA is efficient and effective to improve system performance.…”

Section: Hardware Caching For Memcachedmentioning

confidence: 99%

“…In addition, FPGAs were used for the hardware caching system with key-value stores in previous studies such as [10] and [11]. These systems were general, so their designs were not specific to Blockchain applications connecting with SPV nodes such as IoT products.…”

Section: Our Contributionsmentioning

confidence: 99%

A Hardware-Based Caching System on FPGA NIC for Blockchain

Sakakibara

Morishima

Nakamura

et al. 2018

IEICE Trans. Inf. & Syst.

Self Cite

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Engineers and researchers have recently paid attention to Blockchain. Blockchain is a fault-tolerant distributed ledger without administrators. Blockchain is originally derived from cryptocurrency, but it is possible to be applied to other industries. Transferring digital asset is called a transaction. Blockchain holds all transactions, so the total amount of Blockchain data will increase as time proceeds. On the other hand, the number of Internet of Things (IoT) products has been increasing. It is difficult for IoT products to hold all Blockchain data because of their storage capacity. Therefore, they access Blockchain data via servers that have Blockchain data. However, if a lot of IoT products access Blockchain network via servers, server overloads will occur. Thus, it is useful to reduce workloads and improve throughput. In this paper, we propose a caching technique using a Field Programmable Gate Array-based (FPGA) Network Interface Card (NIC) which possesses four 10Gigabit Ethernet (10GbE) interfaces. The proposed system can reduce server overloads, because the FPGA NIC instead of the server responds to requests from IoT products if cache hits. We implemented the proposed hardware cache to achieve high throughput on NetFPGA-10G board. We counted the number of requests that the server or the FPGA NIC processed as an evaluation. As a result, the throughput improved by on average 1.97 times when hitting the cache.

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A Multilevel NOSQL Cache Design Combining In-NIC and In-Kernel Caches

Cited by 15 publications

References 16 publications

A Comprehensive Study on Optimizing Systems with Data Processing Units

A Comprehensive Study on Optimizing Systems with Data Processing Units

Research on Multicore Key-Value Storage System for Domain Name Storage

A Hardware-Based Caching System on FPGA NIC for Blockchain

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