A nano-composite polyamide imide passivation for 10 kV power electronics modules

Zhou, Jinchang; Ang, Simon S.; Mantooth, Alan; Balda, Juan Carlos

doi:10.1109/ecce.2012.6342243

Cited by 5 publications

(2 citation statements)

References 9 publications

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“…-Add a thin coating in the insulation system, like a polyimide (PI) or polyamide-imide (PAI) film [12], to improve the voltage withstand at the specific point of the greatest stress, either to spread the equipotentials with linear semi-resistive varnishes based on hydrogenated amorphous silicon (a − Si : H) [13], or non-linear semi-resistive varnishes based on polyimide filled with micro-particles of zinc oxide (ZnO) [14]. -Locally improve the dielectric properties of the encapsulation insulator using anisotropic materials or properties gradient materials Functionally Graded Materials (FGM) [15].…”

Section: Classic Strategies To Reduce Electric Field Constraintsmentioning

confidence: 99%

Metallized ceramic substrate with mesa structure for voltage ramp-up of power modules

Hourdequin

Laudebat

Locatelli

et al. 2019

Eur. Phys. J. Appl. Phys.

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As the available wide bandgap semiconductors continuingly increase their operating voltages, the electrical insulation used in their packaging is increasingly constrained. More precisely the ceramic substrate, used in demanding applications, represents a key multi-functional element is being in charge of the mechanical support of the metallic track that interconnects the semiconductor chips with the rest of the power system, as well as of electrical insulation and of thermal conduction. In this complex assembly, the electric field enhancement at the triple junction between the ceramic, the metallic track borders and the insulating environment is usually a critical point. When the electrical field at the triple point exceeds the critical value allowed by the insulation system, this hampers the device performance and limits the voltage rating for future systems. The solution proposed here is based on the shape modification of the ceramic substrate by creating a mesa structure (plateau) that holds the metallic tracks in the assembly. A numerical simulation approach is used to optimize the structure. After the elaboration of the structures by ultrasonic machining we observed a significant increase (30%) in the partial discharge detection voltages, at 10 pC sensitivity, in a substrate with a mesa structure when comparing to a conventional metallized ceramic substrate.

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Section: Classic Strategies To Reduce Electric Field Constraintsmentioning

confidence: 99%

Metallized ceramic substrate with mesa structure for voltage ramp-up of power modules

Hourdequin

Laudebat

Locatelli

et al. 2019

Eur. Phys. J. Appl. Phys.

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show abstract

“…Naturally, voltage breakdown between the topside and backside of the devices is inevitable due to the small distances between them. In order to eliminate this voltage breakdown potential, UA researchers have developed a two-step passivation technique using a nano silica embedded polyamide imide layer [11].…”

Section: Relation To Researchmentioning

confidence: 99%

Power Electronic Module Packaging at UA

2013

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Power electronic modules incorporating silicon carbide (SiC) and gallium nitride (GaN) power semiconductors enable many power electronic system applications otherwise not possible for their silicon counterparts. These power electronic modules are desired to operate at junction temperatures of greater than 200 o C. As such, the design and fabrication of power electronic modules become more challenging and involve several multidisciplinary engineering expertise. This paper addresses the educational and research efforts in power electronic module packaging at the University of Arkansas.

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