A neuromorphic VLSI design for spike timing and rate based synaptic plasticity

Abstract

A neuromorphic VLSI design for spike timing and rate based synaptic plasticity Neural Networks, 2013; 45:70-82 © 2013 Elsevier Ltd. All rights reserved. NOTICE: this is the author's version of a work that was accepted for publication in Neural Networks. Changes resulting from the publishing process, such as peer review, editing, corrections, structural formatting, and other quality control mechanisms may not be reflected in this document. Changes may have been made to this work since it was submitted for publication. A definitive version was subsequently published in Neural Networks, 2013; 45:70-82 Elsevier's AAM Policy: Authors retain the right to use the accepted author manuscript for personal use, internal institutional use and for permitted scholarly posting provided that these are not for purposes of commercial use or systematic distribution.Elsevier believes that individual authors should be able to distribute their AAMs for their personal voluntary needs and interests, e.g. posting to their websites or their institution's repository, e-mailing to colleagues. However, our policies differ regarding the systematic aggregation or distribution of AAMs to ensure the sustainability of the journals to which AAMs are submitted. Therefore, deposit in, or posting to, subjectoriented or centralized repositories (such as PubMed Central), or institutional repositories with systematic posting mandates is permitted only under specific agreements between Elsevier and the repository, agency or institution, and only consistent with the publisher's policies concerning such repositories. AbstractTriplet-based Spike Timing Dependent Plasticity (TSTDP) is a powerful synaptic plasticity rule that acts beyond conventional pair-based STDP (PSTDP). Here, the TSTDP is capable of reproducing the outcomes from a variety of biological experiments, while the PSTDP rule fails to reproduce them. Additionally, it has been shown that the behaviour inherent to the spike rate-based Bienenstock-Cooper-Munro (BCM) synaptic plasticity rule can also emerge from the TSTDP rule. This paper proposes an analog implementation of the TSTDP rule. The proposed VLSI circuit has been designed using the AMS 0.35 µm CMOS process and has been simulated using design kits for Synopsys and Cadence tools. Simulation results demonstrate how well the proposed circuit can alter synaptic weights according to the timing difference amongst a set of different patterns of spikes. Furthermore, the circuit is shown to give rise to a BCM-like learning rule, which is a rate-based rule. To mimic implementation environment, a 1000 run Monte Carlo (MC) analysis was conducted on the proposed circuit. The presented MC simulation analysis and the simulation result from fine-tuned circuits show that, it is possible to mitigate the effect of process variations in the proof of concept circuit, however, a practical variation aware design technique is required to promise a high circuit performance in a large scale neural network. We believe that the proposed design can play a signi...

Tunable Low Energy, Compact and High Performance Neuromorphic Circuit for Spike-Based Synaptic Plasticity

“…Although a number of other synaptic plasticity circuits that are shown in the table, are also capable of qualitatively generating the required experiments [23], [37], they need changes in their synaptic parameters or in their initial implementations, in order to be able to mimic biological experiments closely and with a small error. The table shows that the TSTDP designs proposed in [17], [32], [38] as well as the proposed design in this paper are able to account for all experiments using shared set of bias parameters. This is a useful feature of the synaptic plasticity circuit, to be able to reproduce as many experimental outcomes as possible, using a single set of parameters, and by means of a fixed design.…”

“…Identical to [35], and previous TSTDP circuit studies [17], [32], which test their proposed triplet model/circuit simulation results against the experimental data using a Normalized Mean Square Error (NMSE) for each of the data sets, the proposed circuit is verified by comparing its simulation results with the experimental data and ensuring a small NMSE value. The NMSE is calculated using Eq.…”

“…In this protocol, 60 pairs of pre- and post-synaptic spikes with a delay of are conducted with a repetition frequency of Hz (in many experiments 1 Hz repetition frequency is used). This experimental protocol has been utilised in experiments reported in [11], [13], [14], and also has been employed in simulations and circuit designs for synaptic plasticity [15]–[17].…”

“…This model is able to account for quadruplet, triplet, and pairing (window) experiments as shown in [10], [17]. In addition to the capability of simultaneously approximation of triplet, quadruplet and STDP window experiments with the same set of synaptic parameters, another minimal version of TSTDP rule, is also capable of reproducing the results of the frequency-dependent pairing experiments performed in the visual cortex [18].…”

Neural dynamics and bifurcation analysis of piecewise linear neuron models

“…Implementation of these models, targeting different applications, has been subject of studies in terms of efficiency and large scale simulations [5][6][7][8][9][10][11][12][13][14][15][16][17][18][19].…”