A new architecture for FPGA based implementation of conversion of binary to double base number system (DBNS) using parallel search technique

Singha, Satrughna; Ghosh, Aniruddha; Sinha, Amitabha

doi:10.1145/2093339.2093343

Cited by 4 publications

(3 citation statements)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…To implement binary to DBNS conversion different approaches are used like Binary Search Tree (BST) [14] Range Table Search (RTS) [15], Improved Range Table Search (IRTS) [13], etc. Among all these approaches the IRTS approach is more advantageous in the aspects of time and hardware complexity compared to other approaches.…”

Section: Conversion Of Binary To Dbnsmentioning

confidence: 99%

Comparative Study and Analysis of Performances among RNS, DBNS, TBNS and MNS for DSP Applications

Roy¹,

Datta²,

Bhagat³

et al. 2015

JSIP

Self Cite

View full text Add to dashboard Cite

This paper presents a comparative study of the performances of arithmetic units, based on different number systems like Residue Number System (RNS), Double Base Number System (DBNS), Triple Base Number System (TBNS) and Mixed Number System (MNS) for DSP applications. The performance analysis is carried out in terms of the hardware utilization, timing complexity and efficiency. The arithmetic units based on these number systems were employed in designing various modulation schemes like Binary Frequency Shift Keying (BFSK) modulator/demodulator. The analysis of the performance of the proposed modulator on above mentioned number systems indicates the superiority of other number systems over binary number system.

show abstract

Section: Conversion Of Binary To Dbnsmentioning

confidence: 99%

Comparative Study and Analysis of Performances among RNS, DBNS, TBNS and MNS for DSP Applications

Roy¹,

Datta²,

Bhagat³

et al. 2015

JSIP

Self Cite

View full text Add to dashboard Cite

show abstract

“…In [8], 10 to 72 points have to be pre-computed and stored (a better usage of silicon area should be a parallel architecture). In [12], an FPGA implementation of binary to DBNS conversion is proposed but only for very small operands (n ≤ 20 bits) in signal processing applications.…”

Section: B Scalar Multiplication Using Double-base Number Systemmentioning

confidence: 99%

On-the-Fly Multi-base Recoding for ECC Scalar Multiplication without Pre-computations

Chabrier

Tisserand

2013

2013 IEEE 21st Symposium on Computer Arithmetic

View full text Add to dashboard Cite

Abstract-Scalar recoding is popular to speed up ECC scalar multiplication: non-adjacent form, double-base number system, multi-base number system. But fast recoding methods require pre-computations: multiples of base point or off-line conversion. In this paper, we present a multi-base recoding method for ECC scalar multiplication based on i) a greedy algorithm starting least significant terms first, ii) cheap divisibility tests by multi-base elements and iii) fast exact divisions by multibase elements. Multi-base terms are obtained on-the-fly using a special recoding unit which operates in parallel to curve-level operations and at very high speed. This ensures that all recoding steps are performed fast enough to schedule the next curve-level operations without interruptions. The proposed method can be fully implemented in hardware without pre-computations. We report FPGA implementation details and very good performances compared to state-of-art results.

show abstract

“…So, instead of conventional TNS multiplier, Double Base Ternary Number System (DBTNS) multiplier can help to reduce the complexity of multiplication [8] [9]. But, major bottleneck is the extraction of indices ([i, j] pair) [10] while converting ternary number to double base number. For implementing DBTNS conversion, LUT based approach has been adopted [11].…”

Section: Introductionmentioning

confidence: 99%

FPGA Implementation of MAC Unit for Double Base Ternary Number System (DBTNS) and its Performance Analysis

Ghosh¹,

Sinha²

2018

IJCA

Self Cite

View full text Add to dashboard Cite

New methodologies for efficiently describing and implementing digital systems are investigated as the complexity of binary digital hardware system is relentlessly expanding. From the recent study, it is shown that multi valued logic approach is more advantageous over existing binary digital system. Ternary means a multilevel switching component, which switches between 3 levels. Recent study on ternary number system (TNS), has shown numerous advantages over binary. In recent times, Double Base Number Systems (DBNS) are considered as alternatives to binary number system because of their capabilities of performing partial product free multiplications. On the other hand, Double Base Ternary Number System (DBTNS) multipliers are efficient compared to conventional TNS multiplier. High performance digital signal processing systems which can able to handle all Digital Signal Processing (DSP) algorithms, broadly utilize Multiply-Accumulate (MAC) operation. So, TNS Adder and DBTNS Multipliers can be used to implement fast MAC units. Keeping this in view, a new approach of designing efficient MAC unit using DBTNS multiplier is proposed in this work. The performance of proposed MAC unit is compared with conventional ternary multiplier-based MAC unit and they are mapped on a FPGA chip. Performance analysis clearly indicates that the supremacy of the proposed architecture over conventional ternary multiplier-based MAC unit.

show abstract

A new architecture for FPGA based implementation of conversion of binary to double base number system (DBNS) using parallel search technique

Cited by 4 publications

References 9 publications

Comparative Study and Analysis of Performances among RNS, DBNS, TBNS and MNS for DSP Applications

Comparative Study and Analysis of Performances among RNS, DBNS, TBNS and MNS for DSP Applications

On-the-Fly Multi-base Recoding for ECC Scalar Multiplication without Pre-computations

FPGA Implementation of MAC Unit for Double Base Ternary Number System (DBTNS) and its Performance Analysis

Contact Info

Product

Resources

About