A new architecture of the dual gate transistor for the analog and digital applications

Zareiee, Meysam

doi:10.1016/j.aeue.2019.01.012

Cited by 20 publications

(7 citation statements)

References 12 publications

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“…In analogue devices the amount of amplification is a figure of merit. It is proportional to transconductance gm, which is defined by gm=dID/dVGS [39]. Higher gm in a device means that gate has better control over device current variation.…”

Section: Resultsmentioning

confidence: 99%

A simulation study of the influence of a high-k insulator and source stack on the performance of a double-gate tunnel FET

2020

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In this paper we investigate the influence of incorporating HfO2 as a dielectric at the drain side and silicon stack at the source side on the electrical performance of a double gate tunnel FET (DG-TFET). For this, we compare a conventional TFET structure with four other structures in which their gate dielectric material is either homogenous or heterogeneous while the insulator in the drain side is either SiO2 or HfO2. Moreover, a structure with silicon source stack has been proposed and the device figures of merit are compared with other counterparts. Our simulation results reveal the fact that the presence of HfO2 insulator in the drain side reduces the ambipolar conduction while heterogeneous gate dielectric enhances the drive current and transconductance. However, HfO2 slightly deteriorates source-gate and drain-gate capacitances compared to conventional TFET. Furthermore, incorporation of silicon source stack along with heterogeneous gate dielectric and HfO2 insulator in the drain side lead to higher ION/IOFF ratio, lower subthreshold slope (S), and lower ambipolar conduction in a 50 nm channel length TFET under study.

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Section: Resultsmentioning

confidence: 99%

A simulation study of the influence of a high-k insulator and source stack on the performance of a double-gate tunnel FET

2020

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“…8 Breakdown voltage is a good measure to consider device persistence against higher unexpected voltages. Breakdown voltage has seriously considered in the literature 17,[44][45][46][47][48] and it is mostly mentioned in high voltage and smart-power applications, where they also offer the advantage of compatibility with VLSI processes. Fig.…”

Section: Resultsmentioning

confidence: 99%

A Scheme for Silicon on Insulator Field Effect Transistor with Improved Performance using Graphene

Karbalaei

Dideban

2019

ECS J. Solid State Sci. Technol.

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In this paper we improve the electrical characteristics of a short channel silicon on insulator metal-oxide-semiconductor-filed-effecttransistor (SOI-MOSFET), with a graphene sheet incorporated on top of the channel (under oxide) close to the source side and a proportionally p-type retrograde doping region which is embedded almost in the middle of the channel. Because graphene sheet and retrogradedoping are simultaneously utilized in the channel, this structure is called "GR-SOI" transistor. Retrograde dopingcauses impurity scattering in the depth of the channel and it virtually decreases the silicon channel thickness. Since graphene sheet has a small bandgap and high mobility, we use it to virtually reduce the channel length, and enhance the ON-current. An immense comparison among our proposed structure (GR-SOI), a structure similar to GR-SOIbut without graphene (R-SOI), and a conventional structure (C-SOI), shows that our proposed device presentssuperior electrical characteristics and reliability compared with its counterparts. Moreover, we investigate the optimum place for locating the graphene sheet along the channel. The obtained results for the drive current, leakage current, subthreshold swing and maximum transconductance are 7.6 mA, 10 pA, 86 mV/dec and 18.5 mS, respectively. Our simulations indicate GR-SOI transistor can be a serious candidate for digital and analog applications.

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“…As the size of transistors is scaled down the performance of the device also gets affected, and an unwanted effect like subthreshold swing (SS) called the short channel effect appears [3][4][5]. Moreover, the GAA structure provides the minimum leakage current (Ioff) with a steeper subthreshold slope [6,7]. To mitigate the short channel effect, various device structures were proposed by considering different engineering techniques such as gate and channel engineering [8].…”

Section: Introductionmentioning

confidence: 99%

Extensive Study of Position-Dependent Multi-Channel GAA MOSFET and its Effect on Device Performance

Bhol¹,

Nanda²

2022

J. Nano- Electron. Phys.

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In this paper, a simulation study is carried out for a multi-channel gate all around (GAA) MOSFET with channel separation calculation. The simulation is performed in lower technology nodes by taking the quantum effect into consideration. The insulator used in this model is a high-k dielectric, which allows the device to be scaled down. The separation between the silicon channel and its effect on device performance is investigated extensively. The performance thus obtained is compared with different channel separations in terms of drain current (ID), threshold voltage (Vth), transconductance (gm) and switching ratio (Ion/Ioff). Further, the leakage current and associated short channel effect such as subthreshold swing (SS) and its dependence on channel separation are studied in detail. An improved value of on-current of 28.9 % along with SS of 70.34 mV/dec is achieved for a separation of 10 nm. However, a switching ratio of 9.13e+08 is obtained for a separation of 6 nm which is comparatively higher than 9 and 10 nm separation.

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A new architecture of the dual gate transistor for the analog and digital applications

Cited by 20 publications

References 12 publications

A simulation study of the influence of a high-k insulator and source stack on the performance of a double-gate tunnel FET

A simulation study of the influence of a high-k insulator and source stack on the performance of a double-gate tunnel FET

A Scheme for Silicon on Insulator Field Effect Transistor with Improved Performance using Graphene

Extensive Study of Position-Dependent Multi-Channel GAA MOSFET and its Effect on Device Performance

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